Merge branch '2.4.x' into 2.5.x

* 2.4.x:
  base/dispatch.c: Check for XMM registers after CPUID probe.
  rand/noise.c: Fix foolish bug in the `getentropy' code.

diff --cc base/dispatch.c
index 9f2ac71,b281ec3..bea97b4
--- 1/base/dispatch.c
--- 2/base/dispatch.c
+++ b/base/dispatch.c
@@@ -547,22 -538,13 +547,22 @@@ int cpu_feature_p(int feat
    switch (feat) {
  #if CPUFAM_X86 || CPUFAM_AMD64
      CASE_CPUFEAT(X86_SSE2, "x86:sse2",
-                xmm_registers_available_p() &&
-                cpuid_features_p(CPUID1D_SSE2, 0));
+                cpuid_features_p(CPUID1D_SSE2, 0) &&
+                xmm_registers_available_p());
      CASE_CPUFEAT(X86_AESNI, "x86:aesni",
-                xmm_registers_available_p() &&
-                cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI));
+                cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI) &&
+                xmm_registers_available_p());
      CASE_CPUFEAT(X86_RDRAND, "x86:rdrand",
                 cpuid_features_p(0, CPUID1C_RDRAND));
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_AVX));
 +    CASE_CPUFEAT(X86_AVX, "x86:avx",
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_SSSE3));
++               cpuid_features_p(0, CPUID1C_AVX) &&
++               xmm_registers_available_p());
 +    CASE_CPUFEAT(X86_SSSE3, "x86:ssse3",
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_PCLMUL));
++               cpuid_features_p(0, CPUID1C_SSSE3) &&
++               xmm_registers_available_p());
 +    CASE_CPUFEAT(X86_PCLMUL, "x86:pclmul",
++               cpuid_features_p(0, CPUID1C_PCLMUL) &&
++               xmm_registers_available_p());
  #endif
  #ifdef CAPMAP
  #  define FEATP__CASE(feat, tok)                                      \