Merge branch '2.4.x' into 2.5.x

[catacomb] / base / dispatch.c

diff --git a/base/dispatch.c b/base/dispatch.c
index 9f2ac71..bea97b4 100644 (file)
--- a/base/dispatch.c
+++ b/base/dispatch.c
@@ -547,22 +547,22 @@ int cpu_feature_p(int feat)
   switch (feat) {
 #if CPUFAM_X86 || CPUFAM_AMD64
     CASE_CPUFEAT(X86_SSE2, "x86:sse2",
-                xmm_registers_available_p() &&
-                cpuid_features_p(CPUID1D_SSE2, 0));
+                cpuid_features_p(CPUID1D_SSE2, 0) &&
+                xmm_registers_available_p());
     CASE_CPUFEAT(X86_AESNI, "x86:aesni",
-                xmm_registers_available_p() &&
-                cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI));
+                cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI) &&
+                xmm_registers_available_p());
     CASE_CPUFEAT(X86_RDRAND, "x86:rdrand",
                 cpuid_features_p(0, CPUID1C_RDRAND));
     CASE_CPUFEAT(X86_AVX, "x86:avx",
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_AVX));
+                cpuid_features_p(0, CPUID1C_AVX) &&
+                xmm_registers_available_p());
     CASE_CPUFEAT(X86_SSSE3, "x86:ssse3",
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_SSSE3));
+                cpuid_features_p(0, CPUID1C_SSSE3) &&
+                xmm_registers_available_p());
     CASE_CPUFEAT(X86_PCLMUL, "x86:pclmul",
-                xmm_registers_available_p() &&
-                cpuid_features_p(0, CPUID1C_PCLMUL));
+                cpuid_features_p(0, CPUID1C_PCLMUL) &&
+                xmm_registers_available_p());
 #endif
 #ifdef CAPMAP
 #  define FEATP__CASE(feat, tok)                                       \