# define CPUID1D_SSE2 (1u << 26)
# define CPUID1D_FXSR (1u << 24)
# define CPUID1C_AESNI (1u << 25)
+# define CPUID1C_RDRAND (1u << 30)
struct cpuid { unsigned a, b, c, d; };
CASE_CPUFEAT(X86_AESNI, "x86:aesni",
xmm_registers_available_p() &&
cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI));
+ CASE_CPUFEAT(X86_RDRAND, "x86:rdrand",
+ cpuid_features_p(0, CPUID1C_RDRAND));
#endif
#ifdef CAPMAP
# define FEATP__CASE(feat, tok) \
CPUFEAT_ARM_VFP, /* VFP floating-point (v3 or v4) */
CPUFEAT_ARM_NEON, /* Advanced SIMD (v1 or v2) */
CPUFEAT_ARM_V4, /* VFPv4 and/or SIMD v2 */
- CPUFEAT_ARM_D32 /* 32 double registers, not 16 */
+ CPUFEAT_ARM_D32, /* 32 double registers, not 16 */
+ CPUFEAT_X86_RDRAND /* Built-in entropy source */
};
extern int cpu_feature_p(int /*feat*/);