mdw@git.distorted.org.uk Git - secnet/blob - serpentsboxes.h

   1 /*
   2  * serpentsboxes.h: S-boxes; internal to Serpent implementation.
   3  */
   4 /*
   5  * This file is Free Software.  It is now being distributed with
   6  * secnet.
   7  *
   8  * Copyright 1998      Ross Anderson, Eli Biham, Lars Knudsen
   9  * Copyright 1995-2001 Stephen Early <steve@greenend.org.uk>
  10  * Copyright 2011-2013 Ian Jackson
  11  *
  12  * For more information about Serpent see
  13  * http://www.cl.cam.ac.uk/users/rja14/serpent.html
  14  *
  15  * You may redistribute secnet as a whole and/or modify it under the
  16  * terms of the GNU General Public License as published by the Free
  17  * Software Foundation; either version 3, or (at your option) any
  18  * later version.
  19  *
  20  * You may redistribute this file and/or modify it under the terms of
  21  * the GNU General Public License as published by the Free Software
  22  * Foundation; either version 2, or (at your option) any later
  23  * version.
  24  *
  25  * This software is distributed in the hope that it will be useful,
  26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  * GNU General Public License for more details.
  29  *
  30  * You should have received a copy of the GNU General Public License
  31  * along with this software; if not, see
  32  * https://www.gnu.org/licenses/gpl.html.
  33  */
  34
  35
  36 /* S0:   3  8 15  1 10  6  5 11 14 13  4  2  7  0  9 12 */
  37
  38 /* depth = 5,7,4,2, Total gates=18 */
  39 #define RND00(a,b,c,d,w,x,y,z) \
  40         { register unsigned long t02, t03, t05, t06, t07, t08, t09, t11, t12, t13, t14, t15, t17, t01;\
  41         t01 = b   ^ c  ; \
  42         t02 = a   | d  ; \
  43         t03 = a   ^ b  ; \
  44         z   = t02 ^ t01; \
  45         t05 = c   | z  ; \
  46         t06 = a   ^ d  ; \
  47         t07 = b   | c  ; \
  48         t08 = d   & t05; \
  49         t09 = t03 & t07; \
  50         y   = t09 ^ t08; \
  51         t11 = t09 & y  ; \
  52         t12 = c   ^ d  ; \
  53         t13 = t07 ^ t11; \
  54         t14 = b   & t06; \
  55         t15 = t06 ^ t13; \
  56         w   =     ~ t15; \
  57         t17 = w   ^ t14; \
  58         x   = t12 ^ t17; }
  59
  60 /* InvS0:  13  3 11  0 10  6  5 12  1 14  4  7 15  9  8  2 */
  61
  62 /* depth = 8,4,3,6, Total gates=19 */
  63 #define InvRND00(a,b,c,d,w,x,y,z) \
  64         { register unsigned long t02, t03, t04, t05, t06, t08, t09, t10, t12, t13, t14, t15, t17, t18, t01;\
  65         t01 = c   ^ d  ; \
  66         t02 = a   | b  ; \
  67         t03 = b   | c  ; \
  68         t04 = c   & t01; \
  69         t05 = t02 ^ t01; \
  70         t06 = a   | t04; \
  71         y   =     ~ t05; \
  72         t08 = b   ^ d  ; \
  73         t09 = t03 & t08; \
  74         t10 = d   | y  ; \
  75         x   = t09 ^ t06; \
  76         t12 = a   | t05; \
  77         t13 = x   ^ t12; \
  78         t14 = t03 ^ t10; \
  79         t15 = a   ^ c  ; \
  80         z   = t14 ^ t13; \
  81         t17 = t05 & t13; \
  82         t18 = t14 | t17; \
  83         w   = t15 ^ t18; }
  84
  85 /* S1:  15 12  2  7  9  0  5 10  1 11 14  8  6 13  3  4 */
  86
  87 /* depth = 10,7,3,5, Total gates=18 */
  88 #define RND01(a,b,c,d,w,x,y,z) \
  89         { register unsigned long t02, t03, t04, t05, t06, t07, t08, t10, t11, t12, t13, t16, t17, t01;\
  90         t01 = a   | d  ; \
  91         t02 = c   ^ d  ; \
  92         t03 =     ~ b  ; \
  93         t04 = a   ^ c  ; \
  94         t05 = a   | t03; \
  95         t06 = d   & t04; \
  96         t07 = t01 & t02; \
  97         t08 = b   | t06; \
  98         y   = t02 ^ t05; \
  99         t10 = t07 ^ t08; \
 100         t11 = t01 ^ t10; \
 101         t12 = y   ^ t11; \
 102         t13 = b   & d  ; \
 103         z   =     ~ t10; \
 104         x   = t13 ^ t12; \
 105         t16 = t10 | x  ; \
 106         t17 = t05 & t16; \
 107         w   = c   ^ t17; }
 108
 109 /* InvS1:   5  8  2 14 15  6 12  3 11  4  7  9  1 13 10  0 */
 110
 111 /* depth = 7,4,5,3, Total gates=18 */
 112 #define InvRND01(a,b,c,d,w,x,y,z) \
 113         { register unsigned long t02, t03, t04, t05, t06, t07, t08, t09, t10, t11, t14, t15, t17, t01;\
 114         t01 = a   ^ b  ; \
 115         t02 = b   | d  ; \
 116         t03 = a   & c  ; \
 117         t04 = c   ^ t02; \
 118         t05 = a   | t04; \
 119         t06 = t01 & t05; \
 120         t07 = d   | t03; \
 121         t08 = b   ^ t06; \
 122         t09 = t07 ^ t06; \
 123         t10 = t04 | t03; \
 124         t11 = d   & t08; \
 125         y   =     ~ t09; \
 126         x   = t10 ^ t11; \
 127         t14 = a   | y  ; \
 128         t15 = t06 ^ x  ; \
 129         z   = t01 ^ t04; \
 130         t17 = c   ^ t15; \
 131         w   = t14 ^ t17; }
 132
 133 /* S2:   8  6  7  9  3 12 10 15 13  1 14  4  0 11  5  2 */
 134
 135 /* depth = 3,8,11,7, Total gates=16 */
 136 #define RND02(a,b,c,d,w,x,y,z) \
 137         { register unsigned long t02, t03, t05, t06, t07, t08, t09, t10, t12, t13, t14, t01;\
 138         t01 = a   | c  ; \
 139         t02 = a   ^ b  ; \
 140         t03 = d   ^ t01; \
 141         w   = t02 ^ t03; \
 142         t05 = c   ^ w  ; \
 143         t06 = b   ^ t05; \
 144         t07 = b   | t05; \
 145         t08 = t01 & t06; \
 146         t09 = t03 ^ t07; \
 147         t10 = t02 | t09; \
 148         x   = t10 ^ t08; \
 149         t12 = a   | d  ; \
 150         t13 = t09 ^ x  ; \
 151         t14 = b   ^ t13; \
 152         z   =     ~ t09; \
 153         y   = t12 ^ t14; }
 154
 155 /* InvS2:  12  9 15  4 11 14  1  2  0  3  6 13  5  8 10  7 */
 156
 157 /* depth = 3,6,8,3, Total gates=18 */
 158 #define InvRND02(a,b,c,d,w,x,y,z) \
 159         { register unsigned long t02, t03, t04, t06, t07, t08, t09, t10, t11, t12, t15, t16, t17, t01;\
 160         t01 = a   ^ d  ; \
 161         t02 = c   ^ d  ; \
 162         t03 = a   & c  ; \
 163         t04 = b   | t02; \
 164         w   = t01 ^ t04; \
 165         t06 = a   | c  ; \
 166         t07 = d   | w  ; \
 167         t08 =     ~ d  ; \
 168         t09 = b   & t06; \
 169         t10 = t08 | t03; \
 170         t11 = b   & t07; \
 171         t12 = t06 & t02; \
 172         z   = t09 ^ t10; \
 173         x   = t12 ^ t11; \
 174         t15 = c   & z  ; \
 175         t16 = w   ^ x  ; \
 176         t17 = t10 ^ t15; \
 177         y   = t16 ^ t17; }
 178
 179 /* S3:   0 15 11  8 12  9  6  3 13  1  2  4 10  7  5 14 */
 180
 181 /* depth = 8,3,5,5, Total gates=18 */
 182 #define RND03(a,b,c,d,w,x,y,z) \
 183         { register unsigned long t02, t03, t04, t05, t06, t07, t08, t09, t10, t11, t13, t14, t15, t01;\
 184         t01 = a   ^ c  ; \
 185         t02 = a   | d  ; \
 186         t03 = a   & d  ; \
 187         t04 = t01 & t02; \
 188         t05 = b   | t03; \
 189         t06 = a   & b  ; \
 190         t07 = d   ^ t04; \
 191         t08 = c   | t06; \
 192         t09 = b   ^ t07; \
 193         t10 = d   & t05; \
 194         t11 = t02 ^ t10; \
 195         z   = t08 ^ t09; \
 196         t13 = d   | z  ; \
 197         t14 = a   | t07; \
 198         t15 = b   & t13; \
 199         y   = t08 ^ t11; \
 200         w   = t14 ^ t15; \
 201         x   = t05 ^ t04; }
 202
 203 /* InvS3:   0  9 10  7 11 14  6 13  3  5 12  2  4  8 15  1 */
 204
 205 /* depth = 3,6,4,4, Total gates=17 */
 206 #define InvRND03(a,b,c,d,w,x,y,z) \
 207         { register unsigned long t02, t03, t04, t05, t06, t07, t09, t11, t12, t13, t14, t16, t01;\
 208         t01 = c   | d  ; \
 209         t02 = a   | d  ; \
 210         t03 = c   ^ t02; \
 211         t04 = b   ^ t02; \
 212         t05 = a   ^ d  ; \
 213         t06 = t04 & t03; \
 214         t07 = b   & t01; \
 215         y   = t05 ^ t06; \
 216         t09 = a   ^ t03; \
 217         w   = t07 ^ t03; \
 218         t11 = w   | t05; \
 219         t12 = t09 & t11; \
 220         t13 = a   & y  ; \
 221         t14 = t01 ^ t05; \
 222         x   = b   ^ t12; \
 223         t16 = b   | t13; \
 224         z   = t14 ^ t16; }
 225
 226 /* S4:   1 15  8  3 12  0 11  6  2  5  4 10  9 14  7 13 */
 227
 228 /* depth = 6,7,5,3, Total gates=19 */
 229 #define RND04(a,b,c,d,w,x,y,z) \
 230         { register unsigned long t02, t03, t04, t05, t06, t08, t09, t10, t11, t12, t13, t14, t15, t16, t01;\
 231         t01 = a   | b  ; \
 232         t02 = b   | c  ; \
 233         t03 = a   ^ t02; \
 234         t04 = b   ^ d  ; \
 235         t05 = d   | t03; \
 236         t06 = d   & t01; \
 237         z   = t03 ^ t06; \
 238         t08 = z   & t04; \
 239         t09 = t04 & t05; \
 240         t10 = c   ^ t06; \
 241         t11 = b   & c  ; \
 242         t12 = t04 ^ t08; \
 243         t13 = t11 | t03; \
 244         t14 = t10 ^ t09; \
 245         t15 = a   & t05; \
 246         t16 = t11 | t12; \
 247         y   = t13 ^ t08; \
 248         x   = t15 ^ t16; \
 249         w   =     ~ t14; }
 250
 251 /* InvS4:   5  0  8  3 10  9  7 14  2 12 11  6  4 15 13  1 */
 252
 253 /* depth = 6,4,7,3, Total gates=17 */
 254 #define InvRND04(a,b,c,d,w,x,y,z) \
 255         { register unsigned long t02, t03, t04, t05, t06, t07, t09, t10, t11, t12, t13, t15, t01;\
 256         t01 = b   | d  ; \
 257         t02 = c   | d  ; \
 258         t03 = a   & t01; \
 259         t04 = b   ^ t02; \
 260         t05 = c   ^ d  ; \
 261         t06 =     ~ t03; \
 262         t07 = a   & t04; \
 263         x   = t05 ^ t07; \
 264         t09 = x   | t06; \
 265         t10 = a   ^ t07; \
 266         t11 = t01 ^ t09; \
 267         t12 = d   ^ t04; \
 268         t13 = c   | t10; \
 269         z   = t03 ^ t12; \
 270         t15 = a   ^ t04; \
 271         y   = t11 ^ t13; \
 272         w   = t15 ^ t09; }
 273
 274 /* S5:  15  5  2 11  4 10  9 12  0  3 14  8 13  6  7  1 */
 275
 276 /* depth = 4,6,8,6, Total gates=17 */
 277 #define RND05(a,b,c,d,w,x,y,z) \
 278         { register unsigned long t02, t03, t04, t05, t07, t08, t09, t10, t11, t12, t13, t14, t01;\
 279         t01 = b   ^ d  ; \
 280         t02 = b   | d  ; \
 281         t03 = a   & t01; \
 282         t04 = c   ^ t02; \
 283         t05 = t03 ^ t04; \
 284         w   =     ~ t05; \
 285         t07 = a   ^ t01; \
 286         t08 = d   | w  ; \
 287         t09 = b   | t05; \
 288         t10 = d   ^ t08; \
 289         t11 = b   | t07; \
 290         t12 = t03 | w  ; \
 291         t13 = t07 | t10; \
 292         t14 = t01 ^ t11; \
 293         y   = t09 ^ t13; \
 294         x   = t07 ^ t08; \
 295         z   = t12 ^ t14; }
 296
 297 /* InvS5:   8 15  2  9  4  1 13 14 11  6  5  3  7 12 10  0 */
 298
 299 /* depth = 4,6,9,7, Total gates=17 */
 300 #define InvRND05(a,b,c,d,w,x,y,z) \
 301         { register unsigned long t02, t03, t04, t05, t07, t08, t09, t10, t12, t13, t15, t16, t01;\
 302         t01 = a   & d  ; \
 303         t02 = c   ^ t01; \
 304         t03 = a   ^ d  ; \
 305         t04 = b   & t02; \
 306         t05 = a   & c  ; \
 307         w   = t03 ^ t04; \
 308         t07 = a   & w  ; \
 309         t08 = t01 ^ w  ; \
 310         t09 = b   | t05; \
 311         t10 =     ~ b  ; \
 312         x   = t08 ^ t09; \
 313         t12 = t10 | t07; \
 314         t13 = w   | x  ; \
 315         z   = t02 ^ t12; \
 316         t15 = t02 ^ t13; \
 317         t16 = b   ^ d  ; \
 318         y   = t16 ^ t15; }
 319
 320 /* S6:   7  2 12  5  8  4  6 11 14  9  1 15 13  3 10  0 */
 321
 322 /* depth = 8,3,6,3, Total gates=19 */
 323 #define RND06(a,b,c,d,w,x,y,z) \
 324         { register unsigned long t02, t03, t04, t05, t07, t08, t09, t10, t11, t12, t13, t15, t17, t18, t01;\
 325         t01 = a   & d  ; \
 326         t02 = b   ^ c  ; \
 327         t03 = a   ^ d  ; \
 328         t04 = t01 ^ t02; \
 329         t05 = b   | c  ; \
 330         x   =     ~ t04; \
 331         t07 = t03 & t05; \
 332         t08 = b   & x  ; \
 333         t09 = a   | c  ; \
 334         t10 = t07 ^ t08; \
 335         t11 = b   | d  ; \
 336         t12 = c   ^ t11; \
 337         t13 = t09 ^ t10; \
 338         y   =     ~ t13; \
 339         t15 = x   & t03; \
 340         z   = t12 ^ t07; \
 341         t17 = a   ^ b  ; \
 342         t18 = y   ^ t15; \
 343         w   = t17 ^ t18; }
 344
 345 /* InvS6:  15 10  1 13  5  3  6  0  4  9 14  7  2 12  8 11 */
 346
 347 /* depth = 5,3,8,6, Total gates=19 */
 348 #define InvRND06(a,b,c,d,w,x,y,z) \
 349         { register unsigned long t02, t03, t04, t05, t06, t07, t08, t09, t12, t13, t14, t15, t16, t17, t01;\
 350         t01 = a   ^ c  ; \
 351         t02 =     ~ c  ; \
 352         t03 = b   & t01; \
 353         t04 = b   | t02; \
 354         t05 = d   | t03; \
 355         t06 = b   ^ d  ; \
 356         t07 = a   & t04; \
 357         t08 = a   | t02; \
 358         t09 = t07 ^ t05; \
 359         x   = t06 ^ t08; \
 360         w   =     ~ t09; \
 361         t12 = b   & w  ; \
 362         t13 = t01 & t05; \
 363         t14 = t01 ^ t12; \
 364         t15 = t07 ^ t13; \
 365         t16 = d   | t02; \
 366         t17 = a   ^ x  ; \
 367         z   = t17 ^ t15; \
 368         y   = t16 ^ t14; }
 369
 370 /* S7:   1 13 15  0 14  8  2 11  7  4 12 10  9  3  5  6 */
 371
 372 /* depth = 10,7,10,4, Total gates=19 */
 373 #define RND07(a,b,c,d,w,x,y,z) \
 374         { register unsigned long t02, t03, t04, t05, t06, t08, t09, t10, t11, t13, t14, t15, t16, t17, t01;\
 375         t01 = a   & c  ; \
 376         t02 =     ~ d  ; \
 377         t03 = a   & t02; \
 378         t04 = b   | t01; \
 379         t05 = a   & b  ; \
 380         t06 = c   ^ t04; \
 381         z   = t03 ^ t06; \
 382         t08 = c   | z  ; \
 383         t09 = d   | t05; \
 384         t10 = a   ^ t08; \
 385         t11 = t04 & z  ; \
 386         x   = t09 ^ t10; \
 387         t13 = b   ^ x  ; \
 388         t14 = t01 ^ x  ; \
 389         t15 = c   ^ t05; \
 390         t16 = t11 | t13; \
 391         t17 = t02 | t14; \
 392         w   = t15 ^ t17; \
 393         y   = a   ^ t16; }
 394
 395 /* InvS7:   3  0  6 13  9 14 15  8  5 12 11  7 10  1  4  2 */
 396
 397 /* depth = 9,7,3,3, Total gates=18 */
 398 #define InvRND07(a,b,c,d,w,x,y,z) \
 399         { register unsigned long t02, t03, t04, t06, t07, t08, t09, t10, t11, t13, t14, t15, t16, t01;\
 400         t01 = a   & b  ; \
 401         t02 = a   | b  ; \
 402         t03 = c   | t01; \
 403         t04 = d   & t02; \
 404         z   = t03 ^ t04; \
 405         t06 = b   ^ t04; \
 406         t07 = d   ^ z  ; \
 407         t08 =     ~ t07; \
 408         t09 = t06 | t08; \
 409         t10 = b   ^ d  ; \
 410         t11 = a   | d  ; \
 411         x   = a   ^ t09; \
 412         t13 = c   ^ t06; \
 413         t14 = c   & t11; \
 414         t15 = d   | x  ; \
 415         t16 = t01 | t10; \
 416         w   = t13 ^ t15; \
 417         y   = t14 ^ t16; }
 418
 419 #define RND08(a,b,c,d,e,f,g,h) RND00(a,b,c,d,e,f,g,h)
 420 #define RND09(a,b,c,d,e,f,g,h) RND01(a,b,c,d,e,f,g,h)
 421 #define RND10(a,b,c,d,e,f,g,h) RND02(a,b,c,d,e,f,g,h)
 422 #define RND11(a,b,c,d,e,f,g,h) RND03(a,b,c,d,e,f,g,h)
 423 #define RND12(a,b,c,d,e,f,g,h) RND04(a,b,c,d,e,f,g,h)
 424 #define RND13(a,b,c,d,e,f,g,h) RND05(a,b,c,d,e,f,g,h)
 425 #define RND14(a,b,c,d,e,f,g,h) RND06(a,b,c,d,e,f,g,h)
 426 #define RND15(a,b,c,d,e,f,g,h) RND07(a,b,c,d,e,f,g,h)
 427 #define RND16(a,b,c,d,e,f,g,h) RND00(a,b,c,d,e,f,g,h)
 428 #define RND17(a,b,c,d,e,f,g,h) RND01(a,b,c,d,e,f,g,h)
 429 #define RND18(a,b,c,d,e,f,g,h) RND02(a,b,c,d,e,f,g,h)
 430 #define RND19(a,b,c,d,e,f,g,h) RND03(a,b,c,d,e,f,g,h)
 431 #define RND20(a,b,c,d,e,f,g,h) RND04(a,b,c,d,e,f,g,h)
 432 #define RND21(a,b,c,d,e,f,g,h) RND05(a,b,c,d,e,f,g,h)
 433 #define RND22(a,b,c,d,e,f,g,h) RND06(a,b,c,d,e,f,g,h)
 434 #define RND23(a,b,c,d,e,f,g,h) RND07(a,b,c,d,e,f,g,h)
 435 #define RND24(a,b,c,d,e,f,g,h) RND00(a,b,c,d,e,f,g,h)
 436 #define RND25(a,b,c,d,e,f,g,h) RND01(a,b,c,d,e,f,g,h)
 437 #define RND26(a,b,c,d,e,f,g,h) RND02(a,b,c,d,e,f,g,h)
 438 #define RND27(a,b,c,d,e,f,g,h) RND03(a,b,c,d,e,f,g,h)
 439 #define RND28(a,b,c,d,e,f,g,h) RND04(a,b,c,d,e,f,g,h)
 440 #define RND29(a,b,c,d,e,f,g,h) RND05(a,b,c,d,e,f,g,h)
 441 #define RND30(a,b,c,d,e,f,g,h) RND06(a,b,c,d,e,f,g,h)
 442 #define RND31(a,b,c,d,e,f,g,h) RND07(a,b,c,d,e,f,g,h)
 443
 444 #define InvRND08(a,b,c,d,e,f,g,h) InvRND00(a,b,c,d,e,f,g,h)
 445 #define InvRND09(a,b,c,d,e,f,g,h) InvRND01(a,b,c,d,e,f,g,h)
 446 #define InvRND10(a,b,c,d,e,f,g,h) InvRND02(a,b,c,d,e,f,g,h)
 447 #define InvRND11(a,b,c,d,e,f,g,h) InvRND03(a,b,c,d,e,f,g,h)
 448 #define InvRND12(a,b,c,d,e,f,g,h) InvRND04(a,b,c,d,e,f,g,h)
 449 #define InvRND13(a,b,c,d,e,f,g,h) InvRND05(a,b,c,d,e,f,g,h)
 450 #define InvRND14(a,b,c,d,e,f,g,h) InvRND06(a,b,c,d,e,f,g,h)
 451 #define InvRND15(a,b,c,d,e,f,g,h) InvRND07(a,b,c,d,e,f,g,h)
 452 #define InvRND16(a,b,c,d,e,f,g,h) InvRND00(a,b,c,d,e,f,g,h)
 453 #define InvRND17(a,b,c,d,e,f,g,h) InvRND01(a,b,c,d,e,f,g,h)
 454 #define InvRND18(a,b,c,d,e,f,g,h) InvRND02(a,b,c,d,e,f,g,h)
 455 #define InvRND19(a,b,c,d,e,f,g,h) InvRND03(a,b,c,d,e,f,g,h)
 456 #define InvRND20(a,b,c,d,e,f,g,h) InvRND04(a,b,c,d,e,f,g,h)
 457 #define InvRND21(a,b,c,d,e,f,g,h) InvRND05(a,b,c,d,e,f,g,h)
 458 #define InvRND22(a,b,c,d,e,f,g,h) InvRND06(a,b,c,d,e,f,g,h)
 459 #define InvRND23(a,b,c,d,e,f,g,h) InvRND07(a,b,c,d,e,f,g,h)
 460 #define InvRND24(a,b,c,d,e,f,g,h) InvRND00(a,b,c,d,e,f,g,h)
 461 #define InvRND25(a,b,c,d,e,f,g,h) InvRND01(a,b,c,d,e,f,g,h)
 462 #define InvRND26(a,b,c,d,e,f,g,h) InvRND02(a,b,c,d,e,f,g,h)
 463 #define InvRND27(a,b,c,d,e,f,g,h) InvRND03(a,b,c,d,e,f,g,h)
 464 #define InvRND28(a,b,c,d,e,f,g,h) InvRND04(a,b,c,d,e,f,g,h)
 465 #define InvRND29(a,b,c,d,e,f,g,h) InvRND05(a,b,c,d,e,f,g,h)
 466 #define InvRND30(a,b,c,d,e,f,g,h) InvRND06(a,b,c,d,e,f,g,h)
 467 #define InvRND31(a,b,c,d,e,f,g,h) InvRND07(a,b,c,d,e,f,g,h)
 468
 469 /* Linear transformations and key mixing: */
 470
 471 #define ROL(x,n) ((((unsigned long)(x))<<(n))| \
 472                   (((unsigned long)(x))>>(32-(n))))
 473 #define ROR(x,n) ((((unsigned long)(x))<<(32-(n)))| \
 474                   (((unsigned long)(x))>>(n)))
 475
 476 #define transform(x0, x1, x2, x3, y0, y1, y2, y3) \
 477       y0 = ROL(x0, 13); \
 478       y2 = ROL(x2, 3); \
 479       y1 = x1 ^ y0 ^ y2; \
 480       y3 = x3 ^ y2 ^ ((unsigned long)y0)<<3; \
 481       y1 = ROL(y1, 1); \
 482       y3 = ROL(y3, 7); \
 483       y0 = y0 ^ y1 ^ y3; \
 484       y2 = y2 ^ y3 ^ ((unsigned long)y1<<7); \
 485       y0 = ROL(y0, 5); \
 486       y2 = ROL(y2, 22)
 487
 488 #define inv_transform(x0, x1, x2, x3, y0, y1, y2, y3) \
 489       y2 = ROR(x2, 22);\
 490       y0 = ROR(x0, 5); \
 491       y2 = y2 ^ x3 ^ ((unsigned long)x1<<7); \
 492       y0 = y0 ^ x1 ^ x3; \
 493       y3 = ROR(x3, 7); \
 494       y1 = ROR(x1, 1); \
 495       y3 = y3 ^ y2 ^ ((unsigned long)y0)<<3; \
 496       y1 = y1 ^ y0 ^ y2; \
 497       y2 = ROR(y2, 3); \
 498       y0 = ROR(y0, 13)
 499
 500 #define keying(x0, x1, x2, x3, subkey) \
 501                          x0^=subkey[0];x1^=subkey[1]; \
 502                          x2^=subkey[2];x3^=subkey[3]
 503
 504 /* PHI: Constant used in the key schedule */
 505 #define PHI 0x9e3779b9L