mtimeout.1: Use correct dash for number ranges.
[misc] / x86-model.1
1 .TH x86-model 1 "30 April 2009" "Edgeware tools"
2 .SH NAME
3 x86-model \- show x86 CPU model information and (a bit) more
4 .SH SYNOPSIS
5 .B x86-model
6 .RB [ \-v ]
7 .RB [ \-i \c
8 .RB | \-d \c
9 .RB |[ \-s ]
10 .IR leaf ] \c
11 .RB | \-x
12 .IR leaf ]
13 .SH DESCRIPTION
14 The
15 .b x86-model
16 program shows basic information about the host's x86-based processor,
17 gleaned from the CPUID instruction. It doesn't work on other processors
18 at all. The
19 .B \-v
20 flag causes more detailed information to be output.
21 .PP
22 The CPUID instruction reads an index in the EAX register which selects a
23 `leaf' of information; it sets the output registers EAX, EBX, ECX, and
24 EDX, to the appropriate values for the selected leaf.
25 .PP
26 By default, or with
27 .BR \-i ,
28 it shows the `display family' and `display model' information for the
29 processor, in the form
30 .IB family _ model H
31 which is used in the tables in Appendix C of Intel's optimization
32 guide. In verbose mode, the processor type, family, model and stepping
33 are shown separately.
34 .PP
35 With the
36 .B \-d
37 option, all of the available CPUID information is dumped to standard
38 output. Each line has the form
39 .IP
40 .IB leaf :
41 .I eax
42 .I ebx
43 .I ecx
44 .I edx
45 .PP
46 Verbose mode makes no difference.
47 .PP
48 With the
49 .B \-s
50 option (or just a
51 .I leaf
52 index), prints the leaf of information selected by
53 .IR leaf ,
54 as four hexadecimal numbers separated by spaces. In verbose mode, the
55 output is written on four lines, labelled with the appropriate register
56 names.
57 .PP
58 With the
59 .B \-x
60 option, the behaviour is as for
61 .B \-s
62 except that `extended function' information is selected by toggling bit
63 31 of the leaf index.
64 .PP
65 If no option is given, but there is a command-line argument, then the
66 behaviour is as for
67 .B \-s
68 with the leaf taken from the argument; otherwise the behaviour is as for
69 .BR \-i .
70 .SH SEE ALSO
71 .BR cpuid (1).
72 .PP
73 .I "Intel 64 and IA-32 Architectures Software Developer's Manual"
74 .br
75 .I "Intel 64 and IA-32 Architectures Optimization Reference Manual"