81c9f8e700a07504d038b8c37e8eb13024806b61
[catacomb] / base / regdump-arm64.S
1 /// -*- mode: asm; asm-comment-char: ?/ -*-
2 ///
3 /// Register dump and debugging for 64-bit ARM
4 ///
5 /// (c) 2019 Straylight/Edgeware
6 ///
7
8 ///----- Licensing notice ---------------------------------------------------
9 ///
10 /// This file is part of Catacomb.
11 ///
12 /// Catacomb is free software: you can redistribute it and/or modify it
13 /// under the terms of the GNU Library General Public License as published
14 /// by the Free Software Foundation; either version 2 of the License, or
15 /// (at your option) any later version.
16 ///
17 /// Catacomb is distributed in the hope that it will be useful, but
18 /// WITHOUT ANY WARRANTY; without even the implied warranty of
19 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 /// Library General Public License for more details.
21 ///
22 /// You should have received a copy of the GNU Library General Public
23 /// License along with Catacomb. If not, write to the Free Software
24 /// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
25 /// USA.
26
27 ///--------------------------------------------------------------------------
28 /// Preliminaries.
29
30 #include "config.h"
31 #include "asm-common.h"
32 #include "regdump.h"
33
34 .arch armv8-a
35
36 .text
37
38 ///--------------------------------------------------------------------------
39 /// Main code.
40
41 FUNC(regdump_gpsave)
42 endprologue
43 // On entry, sp should point to `REGDUMP_GPSIZE' bytes of
44 // doubleword-aligned storage to be the general-purpose save area,
45 // with x16, x17, and x30 already saved. On exit, the initial
46 // registers are saved in this space, and modified: x20 points to the
47 // general-purpose save area, x22 holds the focus address (possibly
48 // already saved), x0 contains the number of bytes required in the
49 // extended save area, and other general-purpose registers are
50 // clobbered or used to communicate with `regdump_xtsave' below.
51 // Doing anything other than lowering the stack pointer and calling
52 // `regdump_xtsave' is not recommended.
53
54 // Save the easy registers.
55 stp x0, x1, [sp, #0]
56 stp x2, x3, [sp, #16]
57 stp x4, x5, [sp, #32]
58 stp x6, x7, [sp, #48]
59 stp x8, x9, [sp, #64]
60 stp x10, x11, [sp, #80]
61 stp x12, x13, [sp, #96]
62 stp x14, x15, [sp, #112]
63 stp x18, x19, [sp, #144]
64 stp x20, x21, [sp, #160]
65 stp x22, x23, [sp, #176]
66 stp x24, x25, [sp, #192]
67 stp x26, x27, [sp, #208]
68 stp x28, x29, [sp, #224]
69
70 mov x20, sp
71
72 // Determine the previous stack pointer and save it.
73 add x0, x20, #REGDUMP_GPSIZE
74 str x0, [x20, #31*8]
75
76 // Capture the status flags.
77 mrs x0, nzcv
78 str x0, [x20, #8*REGIX_NZCV]
79
80 // Set the return address as our PC.
81 str x30, [x20, #8*REGIX_PC]
82
83 // Load the focus address and save it as x22.
84 ldr x22, [x20, #8*REGIX_ADDR]
85
86 // Determine the extended save area size.
87 mov x0, #REGDUMP_FPSIZE
88
89 // Done.
90 ret
91
92 ENDFUNC
93
94 FUNC(regdump_gprstr)
95 endprologue
96 // On entry, x20 points to a general-purpose save area, established
97 // by `regdump_gpsave'. On exit, the general-purpose registers
98 // (other than x30 and sp) are restored to their original values.
99
100 // Restore the processor flags.
101 ldr w0, [x20, #8*REGIX_NZCV]
102 msr nzcv, x0
103
104 // Load the easy registers.
105 ldp x0, x1, [sp, #0]
106 ldp x2, x3, [sp, #16]
107 ldp x4, x5, [sp, #32]
108 ldp x6, x7, [sp, #48]
109 ldp x8, x9, [sp, #64]
110 ldp x10, x11, [sp, #80]
111 ldp x12, x13, [sp, #96]
112 ldp x14, x15, [sp, #112]
113 ldp x16, x17, [sp, #128]
114 ldp x18, x19, [sp, #144]
115 ldp x20, x21, [sp, #160]
116 ldp x22, x23, [sp, #176]
117 ldp x24, x25, [sp, #192]
118 ldp x26, x27, [sp, #208]
119 ldp x28, x29, [sp, #224]
120
121 // Done.
122 ret
123
124 ENDFUNC
125
126 FUNC(regdump_xtsave)
127 endprologue
128 // On entry, sp points to an extended save area, of size determined
129 // by `regdump_gpsave' above. On exit, the save area is filled in
130 // and a handy map placed at its base.
131
132 // Set up the map/extended save area pointer.
133 mov x21, sp
134
135 // Start by filling in the easy part of the map.
136 add x0, x21, #regmap_size
137 stp x20, x0, [x21]
138
139 // Get the FP status register.
140 mrs x1, fpsr
141 mrs x2, fpcr
142 stp w1, w2, [x0], #8
143
144 // Store the SIMD registers.
145 stp q0, q1, [x0, #0]
146 stp q2, q3, [x0, #32]
147 stp q4, q5, [x0, #64]
148 stp q6, q7, [x0, #96]
149 stp q8, q9, [x0, #128]
150 stp q10, q11, [x0, #160]
151 stp q12, q13, [x0, #192]
152 stp q14, q15, [x0, #224]
153 stp q16, q17, [x0, #256]
154 stp q18, q19, [x0, #288]
155 stp q20, q21, [x0, #320]
156 stp q22, q23, [x0, #352]
157 stp q24, q25, [x0, #384]
158 stp q26, q27, [x0, #416]
159 stp q28, q29, [x0, #448]
160 stp q30, q31, [x0, #480]
161
162 // Done.
163 ret
164
165 ENDFUNC
166
167 FUNC(regdump_xtrstr)
168 endprologue
169 // On entry, x21 points to a register-save map. On exit, the
170 // extended registers are restored from the save area, x20 (pointing
171 // to the general-purpose save area) is preserved, and the other
172 // general registers are clobbered.
173
174 ldr x0, [x21, #regmap_fp]
175
176 // Load the FP status and control registers.
177 ldp w1, w2, [x0], #8
178 msr fpsr, x1
179 msr fpcr, x2
180
181 // Load the SIMD registers.
182 ldp q0, q1, [x0, #0]
183 ldp q2, q3, [x0, #32]
184 ldp q4, q5, [x0, #64]
185 ldp q6, q7, [x0, #96]
186 ldp q8, q9, [x0, #128]
187 ldp q10, q11, [x0, #160]
188 ldp q12, q13, [x0, #192]
189 ldp q14, q15, [x0, #224]
190 ldp q16, q17, [x0, #256]
191 ldp q18, q19, [x0, #288]
192 ldp q20, q21, [x0, #320]
193 ldp q22, q23, [x0, #352]
194 ldp q24, q25, [x0, #384]
195 ldp q26, q27, [x0, #416]
196 ldp q28, q29, [x0, #448]
197 ldp q30, q31, [x0, #480]
198
199 // Done.
200 ret
201
202 ENDFUNC
203
204 ///----- That's all, folks --------------------------------------------------