1 /// -*- mode: asm; asm-comment-char: ?/ -*-
3 /// AESNI-based implementation of Rijndael
5 /// (c) 2015 Straylight/Edgeware
8 ///----- Licensing notice ---------------------------------------------------
10 /// This file is part of Catacomb.
12 /// Catacomb is free software; you can redistribute it and/or modify
13 /// it under the terms of the GNU Library General Public License as
14 /// published by the Free Software Foundation; either version 2 of the
15 /// License, or (at your option) any later version.
17 /// Catacomb is distributed in the hope that it will be useful,
18 /// but WITHOUT ANY WARRANTY; without even the implied warranty of
19 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 /// GNU Library General Public License for more details.
22 /// You should have received a copy of the GNU Library General Public
23 /// License along with Catacomb; if not, write to the Free
24 /// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25 /// MA 02111-1307, USA.
27 ///--------------------------------------------------------------------------
28 /// External definitions.
31 #include "asm-common.h"
34 .globl F(rijndael_rcon)
36 ///--------------------------------------------------------------------------
42 /// The AESNI instructions implement a little-endian version of AES, but
43 /// Catacomb's internal interface presents as big-endian so as to work better
44 /// with things like GCM. We therefore maintain the round keys in
45 /// little-endian form, and have to end-swap blocks in and out.
47 /// For added amusement, the AESNI instructions don't implement the
48 /// larger-block versions of Rijndael, so we have to end-swap the keys if
49 /// we're preparing for one of those.
52 .equ maxrounds, 16 // maximum number of rounds
53 .equ maxblksz, 32 // maximum block size, in bytes
54 .equ kbufsz, maxblksz*(maxrounds + 1) // size of a key-schedule buffer
57 .equ nr, 0 // number of rounds
58 .equ w, nr + 4 // encryption key words
59 .equ wi, w + kbufsz // decryption key words
61 ///--------------------------------------------------------------------------
64 FUNC(rijndael_setup_x86ish_aesni)
70 // Arguments are on the stack. We'll need to stack the caller's
71 // register veriables, but we'll manage.
73 # define CTX ebp // context pointer
74 # define BLKSZ [esp + 24] // block size
76 # define KSZ ebx // key size
77 # define NKW edx // total number of key words
78 # define NKW_NEEDS_REFRESH 1 // ... needs recalculating
79 # define RCON ecx // round constants table
80 # define LIM edx // limit pointer
81 # define CYIX edi // index in shift-register cycle
83 # define NR ecx // number of rounds
84 # define LRK eax // distance to last key
85 # define BLKOFF edx // block size in bytes
87 // Stack the caller's registers.
93 // Set up our own variables.
94 mov CTX, [esp + 20] // context base pointer
95 mov SI, [esp + 28] // key material
96 mov KSZ, [esp + 32] // key size, in words
99 #if CPUFAM_AMD64 && ABI_SYSV
100 // Arguments are in registers. We have plenty, but, to be honest,
101 // the initial register allocation is a bit annoying.
103 # define CTX r8 // context pointer
104 # define BLKSZ r9d // block size
106 # define KSZ edx // key size
107 # define NKW r10d // total number of key words
108 # define RCON rdi // round constants table
109 # define LIM rcx // limit pointer
110 # define CYIX r11d // index in shift-register cycle
112 # define NR ecx // number of rounds
113 # define LRK eax // distance to last key
114 # define BLKOFF r9d // block size in bytes
116 // Move arguments to more useful places.
117 mov CTX, rdi // context base pointer
118 mov BLKSZ, esi // block size in words
119 mov SI, rdx // key material
120 mov KSZ, ecx // key size, in words
123 #if CPUFAM_AMD64 && ABI_WIN
124 // Arguments are in different registers, and they're a little tight.
126 # define CTX r8 // context pointer
127 # define BLKSZ edx // block size
129 # define KSZ r9d // key size
130 # define NKW r10d // total number of key words
131 # define RCON rdi // round constants table
132 # define LIM rcx // limit pointer
133 # define CYIX r11d // index in shift-register cycle
135 # define NR ecx // number of rounds
136 # define LRK eax // distance to last key
137 # define BLKOFF edx // block size in bytes
139 // We'll need the index registers, which belong to the caller in this
147 // Move arguments to more useful places.
148 mov rsi, r8 // key material
149 mov CTX, rcx // context base pointer
152 // The initial round key material is taken directly from the input
153 // key, so copy it over.
154 #if CPUFAM_AMD64 && ABI_SYSV
155 // We've been lucky. We already have a copy of the context pointer
156 // in rdi, and the key size in ecx.
164 // Find out other useful things.
165 mov NKW, [CTX + nr] // number of rounds
167 imul NKW, BLKSZ // total key size in words
168 #if !NKW_NEEDS_REFRESH
169 // If we can't keep NKW for later, then we use the same register for
170 // it and LIM, so this move is unnecessary.
173 sub DWORD(LIM), KSZ // offset by the key size
175 // Find the round constants.
177 leaext RCON, F(rijndael_rcon), WHOLE(c)
179 // Prepare for the main loop.
181 mov eax, [SI + 4*WHOLE(KSZ) - 4] // most recent key word
182 lea LIM, [SI + 4*LIM] // limit, offset by one key expansion
183 xor CYIX, CYIX // start of new cycle
185 // Main key expansion loop. The first word of each key-length chunk
186 // needs special treatment.
188 // This is rather tedious because the Intel `AESKEYGENASSIST'
189 // instruction is very strangely shaped. Firstly, it wants to
190 // operate on vast SSE registers, even though we're data-blocked from
191 // doing more than operation at a time unless we're doing two key
192 // schedules simultaneously -- and even then we can't do more than
193 // two, because the instruction ignores two of its input words
194 // entirely, and produces two different outputs for each of the other
195 // two. And secondly it insists on taking the magic round constant
196 // as an immediate, so it's kind of annoying if you're not
197 // open-coding the whole thing. It's much easier to leave that as
198 // zero and XOR in the round constant by hand.
199 0: cmp CYIX, 0 // first word of the cycle?
201 cmp CYIX, 4 // fourth word of the cycle?
203 cmp KSZ, 7 // and a large key?
206 // Fourth word of the cycle, and seven or eight words of key. Do a
207 // byte substitution.
209 pshufd xmm0, xmm0, SHUF(2, 1, 0, 3)
210 aeskeygenassist xmm1, xmm0, 0
214 // First word of the cycle. This is the complicated piece.
216 pshufd xmm0, xmm0, SHUF(0, 3, 2, 1)
217 aeskeygenassist xmm1, xmm0, 0
218 pshufd xmm1, xmm1, SHUF(2, 1, 0, 3)
223 // Common tail. Mix in the corresponding word from the previous
224 // cycle and prepare for the next loop.
226 mov [SI + 4*WHOLE(KSZ)], eax
236 // Next job is to construct the decryption keys. The keys for the
237 // first and last rounds don't need to be mangled, but the remaining
238 // ones do -- and they all need to be reordered too.
240 // The plan of action, then, is to copy the final encryption round's
241 // keys into place first, then to do each of the intermediate rounds
242 // in reverse order, and finally do the first round.
244 // Do all of the heavy lifting with SSE registers. The order we're
245 // doing this in means that it's OK if we read or write too much, and
246 // there's easily enough buffer space for the over-enthusiastic reads
247 // and writes because the context has space for 32-byte blocks, which
248 // is our maximum and an exact fit for two SSE registers.
249 9: mov NR, [CTX + nr] // number of rounds
250 #if NKW_NEEDS_REFRESH
255 // If we retain NKW, then BLKSZ and BLKOFF are the same register
256 // because we won't need the former again.
261 lea SI, [CTX + w + 4*WHOLE(LRK)] // last round's keys
262 shl BLKOFF, 2 // block size (in bytes now)
264 // Copy the last encryption round's keys.
269 movdqu xmm0, [SI + 16]
270 movdqu [DI + 16], xmm0
272 // Update the loop variables and stop if we've finished.
273 0: add DI, WHOLE(BLKOFF)
274 sub SI, WHOLE(BLKOFF)
278 // Do another middle round's keys...
284 movdqu xmm0, [SI + 16]
286 movdqu [DI + 16], xmm0
289 // Finally do the first encryption round.
294 movdqu xmm0, [SI + 16]
295 movdqu [DI + 16], xmm0
297 // If the block size is not exactly four words then we must end-swap
298 // everything. We can use fancy SSE toys for this.
302 // Find the byte-reordering table.
304 movdqa xmm5, [INTADDR(endswap_tab, ecx)]
306 #if NKW_NEEDS_REFRESH
307 // Calculate the number of subkey words again. (It's a good job
308 // we've got a fast multiplier.)
314 // End-swap the encryption keys.
318 // And the decryption keys.
329 #if CPUFAM_AMD64 && ABI_WIN
337 INTFUNC(endswap_block)
338 // End-swap NKW words starting at SI. The end-swapping table is
339 // already loaded into XMM5; and it's OK to work in 16-byte chunks.
340 #if CPUFAM_AMD64 && ABI_WIN
367 ///--------------------------------------------------------------------------
368 /// Encrypting and decrypting blocks.
370 .macro encdec op, aes, koff
371 FUNC(rijndael_\op\()_x86ish_aesni)
374 // Arguments come in on the stack, and need to be collected. We
375 // don't have a shortage of registers.
386 #if CPUFAM_AMD64 && ABI_SYSV
387 // Arguments come in registers. All is good.
395 #if CPUFAM_AMD64 && ABI_WIN
396 // Arguments come in different registers.
405 // Find the magic endianness-swapping table.
407 movdqa xmm5, [INTADDR(endswap_tab, ecx)]
415 // Initial whitening.
423 // Dispatch to the correct code.
462 movdqu xmm1, [K + 16]
466 movdqu xmm1, [K + 32]
470 movdqu xmm1, [K + 48]
474 movdqu xmm1, [K + 64]
478 movdqu xmm1, [K + 80]
482 movdqu xmm1, [K + 96]
486 movdqu xmm1, [K + 112]
490 movdqu xmm1, [K + 128]
494 movdqu xmm1, [K + 144]
495 \aes\()last xmm0, xmm1
497 // Unpermute the ciphertext block and store it.
512 encdec eblk, aesenc, w
513 encdec dblk, aesdec, wi
515 ///--------------------------------------------------------------------------
516 /// Random utilities.
519 // Abort the process because of a programming error. Indirecting
520 // through this point serves several purposes: (a) by CALLing, rather
521 // than branching to, `abort', we can save the return address, which
522 // might at least provide a hint as to what went wrong; (b) we don't
523 // have conditional CALLs (and they'd be big anyway); and (c) we can
524 // write a HLT here as a backstop against `abort' being mad.
525 #if CPUFAM_AMD64 && ABI_WIN
535 ///--------------------------------------------------------------------------
547 ///----- That's all, folks --------------------------------------------------