1 /// -*- mode: asm; asm-comment-char: ?/ -*-
3 /// Register dump and debugging for 64-bit ARM
5 /// (c) 2019 Straylight/Edgeware
8 ///----- Licensing notice ---------------------------------------------------
10 /// This file is part of Catacomb.
12 /// Catacomb is free software: you can redistribute it and/or modify it
13 /// under the terms of the GNU Library General Public License as published
14 /// by the Free Software Foundation; either version 2 of the License, or
15 /// (at your option) any later version.
17 /// Catacomb is distributed in the hope that it will be useful, but
18 /// WITHOUT ANY WARRANTY; without even the implied warranty of
19 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 /// Library General Public License for more details.
22 /// You should have received a copy of the GNU Library General Public
23 /// License along with Catacomb. If not, write to the Free Software
24 /// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
27 ///--------------------------------------------------------------------------
31 #include "asm-common.h"
38 ///--------------------------------------------------------------------------
43 // On entry, sp should point to `REGDUMP_GPSIZE' bytes of
44 // doubleword-aligned storage to be the general-purpose save area,
45 // with x16, x17, and x30 already saved. On exit, the initial
46 // registers are saved in this space, and modified: x20 points to the
47 // general-purpose save area, x22 holds the focus address (possibly
48 // already saved), x0 contains the number of bytes required in the
49 // extended save area, and other general-purpose registers are
50 // clobbered or used to communicate with `regdump_xtsave' below.
51 // Doing anything other than lowering the stack pointer and calling
52 // `regdump_xtsave' is not recommended.
54 // Save the easy registers.
59 stp x18, x19, [sp, #144]
60 stp x20, x21, [sp, #160]
61 stp x22, x23, [sp, #176]
62 stp x24, x25, [sp, #192]
63 stp x26, x27, [sp, #208]
64 stp x28, x29, [sp, #224]
68 // Determine the previous stack pointer and save it.
69 add x0, x20, #REGDUMP_GPSIZE
72 // Set the return address as our PC.
73 str x30, [x20, #8*REGIX_PC]
75 // Load the focus address and save it as x22.
76 ldr x22, [x20, #8*REGIX_ADDR]
78 // Determine the extended save area size.
79 mov x0, #REGDUMP_FPSIZE
88 // On entry, x20 points to a general-purpose save area, established
89 // by `regdump_gpsave'. On exit, the general-purpose registers
90 // (other than x30 and sp) are restored to their original values.
92 // Restore the processor flags.
93 ldr w0, [x20, #8*REGIX_NZCV]
96 // Load the easy registers.
100 ldp x6, x7, [sp, #48]
101 ldp x8, x9, [sp, #64]
102 ldp x10, x11, [sp, #80]
103 ldp x12, x13, [sp, #96]
104 ldp x14, x15, [sp, #112]
105 ldp x16, x17, [sp, #128]
106 ldp x18, x19, [sp, #144]
107 ldp x20, x21, [sp, #160]
108 ldp x22, x23, [sp, #176]
109 ldp x24, x25, [sp, #192]
110 ldp x26, x27, [sp, #208]
111 ldp x28, x29, [sp, #224]
120 // On entry, sp points to an extended save area, of size determined
121 // by `regdump_gpsave' above. On exit, the save area is filled in
122 // and a handy map placed at its base, and x21 is left pointing
123 // pointing to the register map.
125 // Set up the map/extended save area pointer.
128 // Start by filling in the easy part of the map.
129 add x0, x21, #regmap_size
132 // Get the FP status register.
137 // Store the SIMD registers.
139 stp q2, q3, [x0, #32]
140 stp q4, q5, [x0, #64]
141 stp q6, q7, [x0, #96]
142 stp q8, q9, [x0, #128]
143 stp q10, q11, [x0, #160]
144 stp q12, q13, [x0, #192]
145 stp q14, q15, [x0, #224]
146 stp q16, q17, [x0, #256]
147 stp q18, q19, [x0, #288]
148 stp q20, q21, [x0, #320]
149 stp q22, q23, [x0, #352]
150 stp q24, q25, [x0, #384]
151 stp q26, q27, [x0, #416]
152 stp q28, q29, [x0, #448]
153 stp q30, q31, [x0, #480]
162 // On entry, x21 points to a register-save map. On exit, the
163 // extended registers are restored from the save area, x20 (pointing
164 // to the general-purpose save area) is preserved, and the other
165 // general registers are clobbered.
167 ldr x0, [x21, #regmap_fp]
169 // Load the FP status and control registers.
174 // Load the SIMD registers.
176 ldp q2, q3, [x0, #32]
177 ldp q4, q5, [x0, #64]
178 ldp q6, q7, [x0, #96]
179 ldp q8, q9, [x0, #128]
180 ldp q10, q11, [x0, #160]
181 ldp q12, q13, [x0, #192]
182 ldp q14, q15, [x0, #224]
183 ldp q16, q17, [x0, #256]
184 ldp q18, q19, [x0, #288]
185 ldp q20, q21, [x0, #320]
186 ldp q22, q23, [x0, #352]
187 ldp q24, q25, [x0, #384]
188 ldp q26, q27, [x0, #416]
189 ldp q28, q29, [x0, #448]
190 ldp q30, q31, [x0, #480]
197 ///----- That's all, folks --------------------------------------------------