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base/asm-common.h: Farm out the section selection macros.
[catacomb] / base / asm-common.h
CommitLineData
1a0c09c4
MW		 1/// -*- mode: asm; asm-comment-char: ?/ -*-
2///
08b868da 3/// Common definitions for asesembler source files
1a0c09c4
MW		 4///
5/// (c) 2015 Straylight/Edgeware
6///
7
8///----- Licensing notice ---------------------------------------------------
9///
10/// This file is part of Catacomb.
11///
12/// Catacomb is free software; you can redistribute it and/or modify
13/// it under the terms of the GNU Library General Public License as
14/// published by the Free Software Foundation; either version 2 of the
15/// License, or (at your option) any later version.
16///
17/// Catacomb is distributed in the hope that it will be useful,
18/// but WITHOUT ANY WARRANTY; without even the implied warranty of
19/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20/// GNU Library General Public License for more details.
21///
22/// You should have received a copy of the GNU Library General Public
23/// License along with Catacomb; if not, write to the Free
24/// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25/// MA 02111-1307, USA.
26
8ce88ea5
MW		 27#ifndef CATACOMB_ASM_COMMON_H
28#define CATACOMB_ASM_COMMON_H
29
1a0c09c4
MW		 30///--------------------------------------------------------------------------
31/// General definitions.
32
898f32b3
MW		 33// Preprocessor hacks.
34#define STRINGY(x) _STRINGY(x, y)
35#define _STRINGY(x) #x
36#define GLUE(x, y) _GLUE(x, y)
37#define _GLUE(x, y) x##y
38#define _EMPTY
39
f8e509a9
MW		 40// Some useful variables.
41 .L$_subsec = 0
42
43// Literal pools done the hard way.
44#define _LIT .text .L$_subsec + 1
45#define _ENDLIT .text .L$_subsec
6c54cbd3 46#define _LTORG .L$_subsec = .L$_subsec + 2; .text .L$_subsec
f8e509a9 47
645fcce0
MW		 48// ELF section types.
49#if __ELF__
50# if CPUFAM_ARMEL
51# define _SECTTY(ty) %ty
52# else
53# define _SECTTY(ty) @ty
54# endif
55#endif
56
1a517bb3
MW		 57// Announcing an internal function.
58#define INTFUNC(name) \
1a0c09c4 59 TYPE_FUNC(name); \
8a1aa284 60 .macro ENDFUNC; _ENDFUNC(name); .endm; \
0923a413 61 .L$_prologue_p = 0; .L$_frameptr_p = 0; \
1a0c09c4 62 FUNC_PREHOOK(name); \
1a517bb3 63name: \
1a0c09c4
MW		 64 FUNC_POSTHOOK(name)
65
1a517bb3
MW		 66// Announcing an external function.
67#define FUNC(name) \
68 .globl F(name); \
69INTFUNC(F(name))
70
1a0c09c4
MW		 71// Marking the end of a function.
72#define _ENDFUNC(name) \
0923a413
MW		 73 .if ~ .L$_prologue_p; .error "Missing `endprologue'"; .endif; \
74 .if .L$_frameptr_p; .purgem dropfp; .endif; \
1a0c09c4
MW		 75 .purgem ENDFUNC; \
76 SIZE_OBJ(name); \
f8e509a9 77 ENDFUNC_HOOK(name); \
6c54cbd3 78 _LTORG
1a0c09c4 79
8ae4c946
MW		 80// Make a helper function, if necessary.
81#define AUXFN(name) \
82 .ifndef .L$_auxfn_def.name; \
83 .text 7128; \
84 .macro _ENDAUXFN; _ENDAUXFN_TAIL(name); .endm; \
85 FUNC_PREHOOK(name); \
86name:
87#define _ENDAUXFN_TAIL(name) \
88 .purgem _ENDAUXFN; \
89 .text .L$_subsec; \
90 .L$_auxfn_def.name = 1
91#define ENDAUXFN _ENDAUXFN; .endif
92
1a0c09c4
MW		 93///--------------------------------------------------------------------------
94/// ELF-specific hacking.
95
96#if __ELF__
97
5336ba54 98// Special arrangements for position-independent code.
1a0c09c4
MW		 99#if __PIC__ || __PIE__
100# define WANT_PIC 1
101#endif
102
b0c2da14
MW		 103// Section selection.
104#define RODATA .section .rodata, "a", _SECTTY(progbits)
105
5336ba54 106// Additional symbol metadata.
1a0c09c4 107#define TYPE_FUNC(name) .type name, STT_FUNC
6ae7b854 108#define TYPE_OBJ(name) .type name, STT_OBJECT
1a0c09c4
MW		 109#define SIZE_OBJ(name) .size name, . - name
110
111#endif
112
113///--------------------------------------------------------------------------
0f23f75f
MW		 114/// Windows-specific hacking.
115
116#if ABI_WIN
1a0c09c4 117
5336ba54 118// Function names need decorating on 32-bit i386.
1a0c09c4 119#if CPUFAM_X86
0f23f75f
MW		 120# define F(name) _##name
121#endif
122
b0c2da14
MW		 123// Section selection.
124#define RODATA .section .rdata, "dr"
125
0f23f75f
MW		 126#endif
127
128///--------------------------------------------------------------------------
129/// x86- and amd64-specific hacking.
130///
131/// It's (slightly) easier to deal with both of these in one go.
132
133#if CPUFAM_X86 || CPUFAM_AMD64
1a0c09c4 134
2cb17e02
MW		 135// Word size.
136#if CPUFAM_X86
137# define WORDSZ 4
138#endif
139#if CPUFAM_AMD64
140# define WORDSZ 8
141#endif
142
1a0c09c4
MW		 143// Set the function hooks.
144#define FUNC_PREHOOK(_) .balign 16
145
f71dd54d
MW		 146// On Windows, arrange to install stack-unwinding data.
147#if CPUFAM_AMD64 && ABI_WIN
148# define FUNC_POSTHOOK(name) .seh_proc name
149# define ENDFUNC_HOOK(_) .seh_endproc
150// Procedures are expected to invoke `.seh_setframe' if necessary, and
151// `.seh_pushreg' and friends, and `.seh_endprologue'.
152#endif
153
0923a413
MW		 154#if __ELF__
155# define FUNC_POSTHOOK(_) .cfi_startproc
156# define ENDFUNC_HOOK(_) .cfi_endproc
157#endif
158
1a0c09c4
MW		 159// Don't use the wretched AT&T syntax. It's festooned with pointless
160// punctuation, and all of the data movement is backwards. Ugh!
161 .intel_syntax noprefix
162
163// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 164.macro callext addr
1a0c09c4
MW		 165#if WANT_PIC
166 call \addr@PLT
167#else
168 call \addr
169#endif
8a1aa284 170.endm
1a0c09c4
MW		 171
172// Do I need to arrange a spare GOT register?
173#if WANT_PIC && CPUFAM_X86
174# define NEED_GOT 1
175#endif
176#define GOTREG ebx // Not needed in AMD64 so don't care.
177
178// Maybe load GOT address into GOT.
8a1aa284 179.macro ldgot got=GOTREG
0f23f75f 180#if WANT_PIC && CPUFAM_X86
8ae4c946 181 AUXFN(_ldgot.\got)
1a0c09c4
MW		 182 mov \got, [esp]
183 ret
8ae4c946
MW		 184 ENDAUXFN
185 call _ldgot.\got
186 add \got, offset _GLOBAL_OFFSET_TABLE_
1a0c09c4 187#endif
8a1aa284 188.endm
1a0c09c4
MW		 189
190// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 191.macro leaext reg, addr, got=GOTREG
1a0c09c4 192#if WANT_PIC
0f23f75f 193# if CPUFAM_X86
1a0c09c4 194 mov \reg, [\got + \addr@GOT]
0f23f75f
MW		 195# endif
196# if CPUFAM_AMD64
197 mov \reg, \addr@GOTPCREL[rip]
198# endif
1a0c09c4 199#else
0f23f75f 200# if CPUFAM_X86
1a0c09c4 201 mov \reg, offset \addr
0f23f75f
MW		 202# endif
203# if CPUFAM_AMD64
204 lea \reg, \addr[rip]
205# endif
1a0c09c4 206#endif
8a1aa284 207.endm
1a0c09c4
MW		 208
209// Address expression (possibly using a base register, and a displacement)
210// referring to ADDR, which is within our module, maybe using GOT.
211#define INTADDR(...) INTADDR__0(__VA_ARGS__, GOTREG, dummy)
212#define INTADDR__0(addr, got, ...) INTADDR__1(addr, got)
0f23f75f
MW		 213#if CPUFAM_AMD64
214# define INTADDR__1(addr, got) addr + rip
215#elif WANT_PIC
1a0c09c4
MW		 216# define INTADDR__1(addr, got) got + addr@GOTOFF
217#else
218# define INTADDR__1(addr, got) addr
219#endif
220
a117c06f
MW		 221// Permutations for SIMD instructions. SHUF(A, B, C, D) is an immediate,
222// suitable for use in `pshufd' or `shufpd', which copies element A
223// (0 <= A < 4) of the source to element 0 of the destination, element B to
224// element 1, element C to element 2, and element D to element 3.
225#define SHUF(a, b, c, d) ((a) + 4*(b) + 16*(c) + 64*(d))
a13b5730 226
43ea7558
MW		 227// Map register names to their individual pieces.
228
229// Apply decoration decor to (internal) register name reg of type ty.
230//
231// See `R_...' for internal register names. Decorations are as follows.
232//
233// b low byte (e.g., `al', `r8b')
234// h high byte (e.g., `ah')
235// w word (e.g., `ax', `r8w')
236// d doubleword (e.g., `eax', `r8d')
237// q quadword (e.g., `rax', `r8')
238// r whole register (doubleword on x86, quadword on amd64)
239//
240// And types are as follows.
241//
242// abcd the four traditional registers `a', `b', `c', `d'
243// xp the four pointer registers `si', `di', `bp', `sp'
244// ip the instruction pointer `ip'
245// rn the AMD64 numbered registers `r8'--`r15'
246#define _DECOR(ty, decor, reg) _DECOR_##ty##_##decor(reg)
247
248// Internal macros: _DECOR_ty_decor(reg) applies decoration decor to
249// (internal) register name reg of type ty.
250
251#define _DECOR_abcd_b(reg) reg##l
252#define _DECOR_abcd_h(reg) reg##h
253#define _DECOR_abcd_w(reg) reg##x
254#define _DECOR_abcd_d(reg) e##reg##x
255#if CPUFAM_AMD64
256# define _DECOR_abcd_q(reg) r##reg##x
257#endif
258
43ea7558
MW		 259#define _DECOR_xp_w(reg) reg
260#define _DECOR_xp_d(reg) e##reg
261#if CPUFAM_AMD64
a105615f 262# define _DECOR_xp_b(reg) reg##l
43ea7558
MW		 263# define _DECOR_xp_q(reg) r##reg
264#endif
265
266#define _DECOR_ip_w(reg) reg
267#define _DECOR_ip_d(reg) e##reg
268#if CPUFAM_AMD64
269# define _DECOR_ip_q(reg) r##reg
270#endif
271
272#if CPUFAM_AMD64
273# define _DECOR_rn_b(reg) reg##b
274# define _DECOR_rn_w(reg) reg##w
275# define _DECOR_rn_d(reg) reg##d
276# define _DECOR_rn_q(reg) reg
277# define _DECOR_rn_r(reg) reg
278#endif
279
005cd277
MW		 280#define _DECOR_mem_b(addr) byte ptr addr
281#define _DECOR_mem_w(addr) word ptr addr
282#define _DECOR_mem_d(addr) dword ptr addr
283#if CPUFAM_AMD64
284# define _DECOR_mem_q(addr) qword ptr addr
285#endif
286
7e251005
MW		 287#define _DECOR_imm_b(imm) byte imm
288#define _DECOR_imm_w(imm) word imm
289#define _DECOR_imm_d(imm) dword imm
290#if CPUFAM_AMD64
291# define _DECOR_imm_q(imm) qword imm
292#endif
293
43ea7558
MW		 294#if CPUFAM_X86
295# define _DECOR_abcd_r(reg) e##reg##x
296# define _DECOR_xp_r(reg) e##reg
297# define _DECOR_ip_r(reg) e##reg
3c0490d1 298# define _DECOR_mem_r(addr) dword ptr addr
7e251005 299# define _DECOR_imm_r(imm) dword imm
43ea7558
MW		 300#endif
301#if CPUFAM_AMD64
302# define _DECOR_abcd_r(reg) r##reg##x
303# define _DECOR_xp_r(reg) r##reg
304# define _DECOR_ip_r(reg) r##reg
3c0490d1 305# define _DECOR_mem_r(addr) qword ptr addr
7e251005 306# define _DECOR_imm_r(imm) qword imm
43ea7558
MW		 307#endif
308
43ea7558
MW		 309// R_r(decor) applies decoration decor to register r, which is an internal
310// register name. The internal register names are: `ip', `a', `b', `c', `d',
311// `si', `di', `bp', `sp', `r8'--`r15'.
4ff9d579 312#define R_nil(decor) nil
43ea7558
MW		 313#define R_ip(decor) _DECOR(ip, decor, ip)
314#define R_a(decor) _DECOR(abcd, decor, a)
315#define R_b(decor) _DECOR(abcd, decor, b)
316#define R_c(decor) _DECOR(abcd, decor, c)
317#define R_d(decor) _DECOR(abcd, decor, d)
318#define R_si(decor) _DECOR(xp, decor, si)
319#define R_di(decor) _DECOR(xp, decor, di)
320#define R_bp(decor) _DECOR(xp, decor, bp)
321#define R_sp(decor) _DECOR(xp, decor, sp)
322#if CPUFAM_AMD64
323# define R_r8(decor) _DECOR(rn, decor, r8)
324# define R_r9(decor) _DECOR(rn, decor, r9)
325# define R_r10(decor) _DECOR(rn, decor, r10)
326# define R_r11(decor) _DECOR(rn, decor, r11)
327# define R_r12(decor) _DECOR(rn, decor, r12)
328# define R_r13(decor) _DECOR(rn, decor, r13)
329# define R_r14(decor) _DECOR(rn, decor, r14)
330# define R_r15(decor) _DECOR(rn, decor, r15)
331#endif
332
333// Refer to an in-memory datum of the type implied by decor residing at
334// address addr (which should supply its own square-brackets).
335#define MEM(decor, addr) _DECOR(mem, decor, addr)
336
7e251005
MW		 337// Refer to an immediate datum of the type implied by decor.
338#define IMM(decor, imm) _DECOR(mem, decor, imm)
339
43ea7558
MW		 340// Applies decoration decor to assembler-level register name reg.
341#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
342
343// Internal macros: _REGFORM_r(decor) applies decoration decor to an
344// assembler-level register name, in place of any decoration that register
345// name has already.
346
4ff9d579
MW		 347#define _REGFORM_nil(decor) R_nil(decor)
348
43ea7558
MW		 349#define _REGFORM_ip(decor) R_ip(decor)
350#define _REGFORM_eip(decor) R_ip(decor)
351
352#define _REGFORM_a(decor) R_a(decor)
353#define _REGFORM_al(decor) R_a(decor)
354#define _REGFORM_ah(decor) R_a(decor)
355#define _REGFORM_ax(decor) R_a(decor)
356#define _REGFORM_eax(decor) R_a(decor)
357
358#define _REGFORM_b(decor) R_b(decor)
359#define _REGFORM_bl(decor) R_b(decor)
360#define _REGFORM_bh(decor) R_b(decor)
361#define _REGFORM_bx(decor) R_b(decor)
362#define _REGFORM_ebx(decor) R_b(decor)
363
364#define _REGFORM_c(decor) R_c(decor)
365#define _REGFORM_cl(decor) R_c(decor)
366#define _REGFORM_ch(decor) R_c(decor)
367#define _REGFORM_cx(decor) R_c(decor)
368#define _REGFORM_ecx(decor) R_c(decor)
369
370#define _REGFORM_d(decor) R_d(decor)
371#define _REGFORM_dl(decor) R_d(decor)
372#define _REGFORM_dh(decor) R_d(decor)
373#define _REGFORM_dx(decor) R_d(decor)
374#define _REGFORM_edx(decor) R_d(decor)
375
376#define _REGFORM_si(decor) R_si(decor)
377#define _REGFORM_sil(decor) R_si(decor)
378#define _REGFORM_esi(decor) R_si(decor)
379
380#define _REGFORM_di(decor) R_di(decor)
381#define _REGFORM_dil(decor) R_di(decor)
382#define _REGFORM_edi(decor) R_di(decor)
383
384#define _REGFORM_bp(decor) R_bp(decor)
385#define _REGFORM_bpl(decor) R_bp(decor)
386#define _REGFORM_ebp(decor) R_bp(decor)
387
388#define _REGFORM_sp(decor) R_sp(decor)
389#define _REGFORM_spl(decor) R_sp(decor)
390#define _REGFORM_esp(decor) R_sp(decor)
391
392#if CPUFAM_AMD64
393
394# define _REGFORM_rip(decor) R_ip(decor)
395# define _REGFORM_rsp(decor) R_sp(decor)
396# define _REGFORM_rbp(decor) R_bp(decor)
397# define _REGFORM_rdi(decor) R_di(decor)
398# define _REGFORM_rsi(decor) R_si(decor)
399# define _REGFORM_rdx(decor) R_d(decor)
400# define _REGFORM_rcx(decor) R_c(decor)
401# define _REGFORM_rbx(decor) R_b(decor)
402# define _REGFORM_rax(decor) R_a(decor)
403
404# define _REGFORM_r8(decor) R_r8(decor)
405# define _REGFORM_r8b(decor) R_r8(decor)
406# define _REGFORM_r8w(decor) R_r8(decor)
407# define _REGFORM_r8d(decor) R_r8(decor)
408
409# define _REGFORM_r9(decor) R_r9(decor)
410# define _REGFORM_r9b(decor) R_r9(decor)
411# define _REGFORM_r9w(decor) R_r9(decor)
412# define _REGFORM_r9d(decor) R_r9(decor)
413
414# define _REGFORM_r10(decor) R_r10(decor)
415# define _REGFORM_r10b(decor) R_r10(decor)
416# define _REGFORM_r10w(decor) R_r10(decor)
417# define _REGFORM_r10d(decor) R_r10(decor)
418
419# define _REGFORM_r11(decor) R_r11(decor)
420# define _REGFORM_r11b(decor) R_r11(decor)
421# define _REGFORM_r11w(decor) R_r11(decor)
422# define _REGFORM_r11d(decor) R_r11(decor)
423
424# define _REGFORM_r12(decor) R_r12(decor)
425# define _REGFORM_r12b(decor) R_r12(decor)
426# define _REGFORM_r12w(decor) R_r12(decor)
427# define _REGFORM_r12d(decor) R_r12(decor)
428
429# define _REGFORM_r13(decor) R_r13(decor)
430# define _REGFORM_r13b(decor) R_r13(decor)
431# define _REGFORM_r13w(decor) R_r13(decor)
432# define _REGFORM_r13d(decor) R_r13(decor)
433
434# define _REGFORM_r14(decor) R_r14(decor)
435# define _REGFORM_r14b(decor) R_r14(decor)
436# define _REGFORM_r14w(decor) R_r14(decor)
437# define _REGFORM_r14d(decor) R_r14(decor)
438
439# define _REGFORM_r15(decor) R_r15(decor)
440# define _REGFORM_r15b(decor) R_r15(decor)
441# define _REGFORM_r15w(decor) R_r15(decor)
442# define _REGFORM_r15d(decor) R_r15(decor)
443
444#endif
445
446// Macros for converting register names.
447#define BYTE(reg) _REGFORM(reg, b)
448#define HIBYTE(reg) _REGFORM(reg, h)
449#define WORD(reg) _REGFORM(reg, w)
450#define DWORD(reg) _REGFORM(reg, d)
451#if CPUFAM_AMD64
452# define QWORD(reg) _REGFORM(reg, q)
453#endif
454#define WHOLE(reg) _REGFORM(reg, r)
455
a90d420c
MW		 456// Macros for some common registers.
457#define AX R_a(r)
458#define BX R_b(r)
459#define CX R_c(r)
460#define DX R_d(r)
461#define SI R_si(r)
462#define DI R_di(r)
463#define BP R_bp(r)
464#define SP R_sp(r)
465
0923a413 466// Stack management and unwinding.
a90d420c 467.macro setfp fp=BP, offset=0
0923a413 468 .if \offset == 0
a90d420c 469 mov \fp, SP
0923a413
MW		 470#if __ELF__
471 .cfi_def_cfa_register \fp
472#endif
473#if ABI_WIN && CPUFAM_AMD64
474 .seh_setframe \fp, 0
475#endif
476 .else
a90d420c 477 lea \fp, [SP + \offset]
0923a413
MW		 478#if __ELF__
479 .cfi_def_cfa_register \fp
480 .cfi_adjust_cfa_offset -\offset
481#endif
482#if ABI_WIN && CPUFAM_AMD64
483 .seh_setframe \fp, \offset
484#endif
485 .endif
486 .L$_frameptr_p = -1
487 .macro dropfp; _dropfp \fp, \offset; .endm
488.endm
489
cdc153a5 490.macro _dropfp fp, offset=0
0923a413 491 .if \offset == 0
a90d420c 492 mov SP, \fp
0923a413 493#if __ELF__
a90d420c 494 .cfi_def_cfa_register SP
0923a413
MW		 495#endif
496 .else
a90d420c 497 lea SP, [\fp - \offset]
0923a413 498#if __ELF__
a90d420c 499 .cfi_def_cfa_register SP
0923a413
MW		 500 .cfi_adjust_cfa_offset +\offset
501#endif
502 .endif
503 .L$_frameptr_p = 0
504 .purgem dropfp
505.endm
506
507.macro stalloc n
a90d420c 508 sub SP, \n
0923a413
MW		 509#if __ELF__
510 .cfi_adjust_cfa_offset +\n
511#endif
512#if ABI_WIN && CPUFAM_AMD64
513 .seh_stackalloc \n
514#endif
515.endm
516
517.macro stfree n
a90d420c 518 add SP, \n
0923a413
MW		 519#if __ELF__
520 .cfi_adjust_cfa_offset -\n
521#endif
522.endm
523
524.macro pushreg r
525 push \r
526#if __ELF__
527 .cfi_adjust_cfa_offset +WORDSZ
528 .cfi_rel_offset \r, 0
529#endif
530#if ABI_WIN && CPUFAM_AMD64
531 .seh_pushreg \r
532#endif
533.endm
534
535.macro popreg r
536 pop \r
537#if __ELF__
538 .cfi_adjust_cfa_offset -WORDSZ
539 .cfi_restore \r
540#endif
541.endm
542
543.macro savexmm r, offset
a90d420c 544 movdqa [SP + \offset], \r
0923a413
MW		 545#if ABI_WIN && CPUFAM_AMD64
546 .seh_savexmm \r, \offset
547#endif
548.endm
549
550.macro rstrxmm r, offset
a90d420c 551 movdqa \r, [SP + \offset]
0923a413
MW		 552.endm
553
554.macro endprologue
555#if ABI_WIN && CPUFAM_AMD64
556 .seh_endprologue
557#endif
558 .L$_prologue_p = -1
559.endm
560
1a0c09c4
MW		 561#endif
562
563///--------------------------------------------------------------------------
61bd904b
MW		 564/// ARM-specific hacking.
565
59d86860 566#if CPUFAM_ARMEL
61bd904b 567
9f6eb05d
MW		 568// ARM/Thumb mode things. Use ARM by default.
569#define ARM .arm; .L$_pcoff = 8
570#define THUMB .thumb; .L$_pcoff = 4
571 ARM
572
61bd904b 573// Set the function hooks.
0923a413
MW		 574#define FUNC_PREHOOK(_) .balign 4; .fnstart
575#define ENDFUNC_HOOK(_) .fnend; .ltorg
61bd904b
MW		 576
577// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 578.macro callext addr, cond=
61bd904b
MW		 579#if WANT_PIC
580 bl\cond \addr(PLT)
581#else
582 bl\cond \addr
583#endif
8a1aa284 584.endm
61bd904b
MW		 585
586// Do I need to arrange a spare GOT register?
587#if WANT_PIC
588# define NEED_GOT 1
589#endif
590#define GOTREG r9
591
592// Maybe load GOT address into GOT.
8a1aa284 593.macro ldgot cond=, got=GOTREG
61bd904b 594#if WANT_PIC
adca2a18
MW		 595 ldr\cond \got, .L$_ldgot$\@
596.L$_ldgot_pc$\@:
2d03a881 597 add\cond \got, pc, \got
8a1aa284 598 _LIT
adca2a18
MW		 599 .balign 4
600.L$_ldgot$\@:
9f6eb05d 601 .word _GLOBAL_OFFSET_TABLE_ - .L$_ldgot_pc$\@ - .L$_pcoff
8a1aa284 602 _ENDLIT
61bd904b 603#endif
8a1aa284 604.endm
61bd904b
MW		 605
606// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 607.macro leaext reg, addr, cond=, got=GOTREG
61bd904b 608#if WANT_PIC
adca2a18 609 ldr\cond \reg, .L$_leaext$\@
2d03a881 610 ldr\cond \reg, [\got, \reg]
8a1aa284 611 _LIT
adca2a18
MW		 612 .balign 4
613.L$_leaext$\@:
614 .word \addr(GOT)
8a1aa284 615 _ENDLIT
61bd904b 616#else
2d03a881 617 ldr\cond \reg, =\addr
61bd904b 618#endif
8a1aa284 619.endm
61bd904b 620
0c53ac58 621// Load address of external symbol ADDR into REG directly.
8a1aa284 622.macro leaextq reg, addr, cond=
0c53ac58
MW		 623#if WANT_PIC
624 ldr\cond \reg, .L$_leaextq$\@
625.L$_leaextq_pc$\@:
b6db2017 626 .if .L$_pcoff == 8
0c53ac58 627 ldr\cond \reg, [pc, \reg]
b6db2017 628 .else
9f6eb05d
MW		 629 add\cond \reg, pc
630 ldr\cond \reg, [\reg]
b6db2017 631 .endif
8a1aa284 632 _LIT
0c53ac58
MW		 633 .balign 4
634.L$_leaextq$\@:
9f6eb05d 635 .word \addr(GOT_PREL) + (. - .L$_leaextq_pc$\@ - .L$_pcoff)
8a1aa284 636 _ENDLIT
0c53ac58
MW		 637#else
638 ldr\cond \reg, =\addr
639#endif
8a1aa284 640.endm
0c53ac58 641
1a031196
MW		 642.macro vzero vz=q15
643 // Set VZ (default q15) to zero.
644 vmov.u32 \vz, #0
645.endm
646
647.macro vshl128 vd, vn, nbit, vz=q15
648 // Set VD to VN shifted left by NBIT. Assume VZ (default q15) is
649 // all-bits-zero. NBIT must be a multiple of 8.
650 .if \nbit&3 != 0
651 .error "shift quantity must be whole number of bytes"
652 .endif
653 vext.8 \vd, \vz, \vn, #16 - (\nbit >> 3)
654.endm
655
656.macro vshr128 vd, vn, nbit, vz=q15
657 // Set VD to VN shifted right by NBIT. Assume VZ (default q15) is
658 // all-bits-zero. NBIT must be a multiple of 8.
659 .if \nbit&3 != 0
660 .error "shift quantity must be whole number of bytes"
661 .endif
662 vext.8 \vd, \vn, \vz, #\nbit >> 3
663.endm
664
43ea7558
MW		 665// Apply decoration decor to register name reg.
666#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
667
668// Internal macros: `_REGFORM_r(decor)' applies decoration decor to register
669// name r.
670
4ff9d579
MW		 671#define _REGFORM_nil(decor) nil
672
43ea7558
MW		 673#define _REGFORM_s0(decor) _DECOR(s, decor, 0)
674#define _REGFORM_s1(decor) _DECOR(s, decor, 1)
675#define _REGFORM_s2(decor) _DECOR(s, decor, 2)
676#define _REGFORM_s3(decor) _DECOR(s, decor, 3)
677#define _REGFORM_s4(decor) _DECOR(s, decor, 4)
678#define _REGFORM_s5(decor) _DECOR(s, decor, 5)
679#define _REGFORM_s6(decor) _DECOR(s, decor, 6)
680#define _REGFORM_s7(decor) _DECOR(s, decor, 7)
681#define _REGFORM_s8(decor) _DECOR(s, decor, 8)
682#define _REGFORM_s9(decor) _DECOR(s, decor, 9)
683#define _REGFORM_s10(decor) _DECOR(s, decor, 10)
684#define _REGFORM_s11(decor) _DECOR(s, decor, 11)
685#define _REGFORM_s12(decor) _DECOR(s, decor, 12)
686#define _REGFORM_s13(decor) _DECOR(s, decor, 13)
687#define _REGFORM_s14(decor) _DECOR(s, decor, 14)
688#define _REGFORM_s15(decor) _DECOR(s, decor, 15)
689#define _REGFORM_s16(decor) _DECOR(s, decor, 16)
690#define _REGFORM_s17(decor) _DECOR(s, decor, 17)
691#define _REGFORM_s18(decor) _DECOR(s, decor, 18)
692#define _REGFORM_s19(decor) _DECOR(s, decor, 19)
693#define _REGFORM_s20(decor) _DECOR(s, decor, 20)
694#define _REGFORM_s21(decor) _DECOR(s, decor, 21)
695#define _REGFORM_s22(decor) _DECOR(s, decor, 22)
696#define _REGFORM_s23(decor) _DECOR(s, decor, 23)
697#define _REGFORM_s24(decor) _DECOR(s, decor, 24)
698#define _REGFORM_s25(decor) _DECOR(s, decor, 25)
699#define _REGFORM_s26(decor) _DECOR(s, decor, 26)
700#define _REGFORM_s27(decor) _DECOR(s, decor, 27)
701#define _REGFORM_s28(decor) _DECOR(s, decor, 28)
702#define _REGFORM_s29(decor) _DECOR(s, decor, 29)
703#define _REGFORM_s30(decor) _DECOR(s, decor, 30)
704#define _REGFORM_s31(decor) _DECOR(s, decor, 31)
705
706#define _REGFORM_d0(decor) _DECOR(d, decor, 0)
707#define _REGFORM_d1(decor) _DECOR(d, decor, 1)
708#define _REGFORM_d2(decor) _DECOR(d, decor, 2)
709#define _REGFORM_d3(decor) _DECOR(d, decor, 3)
710#define _REGFORM_d4(decor) _DECOR(d, decor, 4)
711#define _REGFORM_d5(decor) _DECOR(d, decor, 5)
712#define _REGFORM_d6(decor) _DECOR(d, decor, 6)
713#define _REGFORM_d7(decor) _DECOR(d, decor, 7)
714#define _REGFORM_d8(decor) _DECOR(d, decor, 8)
715#define _REGFORM_d9(decor) _DECOR(d, decor, 9)
716#define _REGFORM_d10(decor) _DECOR(d, decor, 10)
717#define _REGFORM_d11(decor) _DECOR(d, decor, 11)
718#define _REGFORM_d12(decor) _DECOR(d, decor, 12)
719#define _REGFORM_d13(decor) _DECOR(d, decor, 13)
720#define _REGFORM_d14(decor) _DECOR(d, decor, 14)
721#define _REGFORM_d15(decor) _DECOR(d, decor, 15)
722#define _REGFORM_d16(decor) _DECOR(d, decor, 16)
723#define _REGFORM_d17(decor) _DECOR(d, decor, 17)
724#define _REGFORM_d18(decor) _DECOR(d, decor, 18)
725#define _REGFORM_d19(decor) _DECOR(d, decor, 19)
726#define _REGFORM_d20(decor) _DECOR(d, decor, 20)
727#define _REGFORM_d21(decor) _DECOR(d, decor, 21)
728#define _REGFORM_d22(decor) _DECOR(d, decor, 22)
729#define _REGFORM_d23(decor) _DECOR(d, decor, 23)
730#define _REGFORM_d24(decor) _DECOR(d, decor, 24)
731#define _REGFORM_d25(decor) _DECOR(d, decor, 25)
732#define _REGFORM_d26(decor) _DECOR(d, decor, 26)
733#define _REGFORM_d27(decor) _DECOR(d, decor, 27)
734#define _REGFORM_d28(decor) _DECOR(d, decor, 28)
735#define _REGFORM_d29(decor) _DECOR(d, decor, 29)
736#define _REGFORM_d30(decor) _DECOR(d, decor, 30)
737#define _REGFORM_d31(decor) _DECOR(d, decor, 31)
738
739#define _REGFORM_q0(decor) _DECOR(q, decor, 0)
740#define _REGFORM_q1(decor) _DECOR(q, decor, 1)
741#define _REGFORM_q2(decor) _DECOR(q, decor, 2)
742#define _REGFORM_q3(decor) _DECOR(q, decor, 3)
743#define _REGFORM_q4(decor) _DECOR(q, decor, 4)
744#define _REGFORM_q5(decor) _DECOR(q, decor, 5)
745#define _REGFORM_q6(decor) _DECOR(q, decor, 6)
746#define _REGFORM_q7(decor) _DECOR(q, decor, 7)
747#define _REGFORM_q8(decor) _DECOR(q, decor, 8)
748#define _REGFORM_q9(decor) _DECOR(q, decor, 9)
749#define _REGFORM_q10(decor) _DECOR(q, decor, 10)
750#define _REGFORM_q11(decor) _DECOR(q, decor, 11)
751#define _REGFORM_q12(decor) _DECOR(q, decor, 12)
752#define _REGFORM_q13(decor) _DECOR(q, decor, 13)
753#define _REGFORM_q14(decor) _DECOR(q, decor, 14)
754#define _REGFORM_q15(decor) _DECOR(q, decor, 15)
755
756// `_LOPART(n)' and `_HIPART(n)' return the numbers of the register halves of
757// register n, i.e., 2*n and 2*n + 1 respectively.
758#define _LOPART(n) _GLUE(_LOPART_, n)
759#define _HIPART(n) _GLUE(_HIPART_, n)
760
761// Internal macros: `_LOPART_n' and `_HIPART_n' return the numbers of the
762// register halves of register n, i.e., 2*n and 2*n + 1 respectively.
763
764#define _LOPART_0 0
765#define _HIPART_0 1
766#define _LOPART_1 2
767#define _HIPART_1 3
768#define _LOPART_2 4
769#define _HIPART_2 5
770#define _LOPART_3 6
771#define _HIPART_3 7
772#define _LOPART_4 8
773#define _HIPART_4 9
774#define _LOPART_5 10
775#define _HIPART_5 11
776#define _LOPART_6 12
777#define _HIPART_6 13
778#define _LOPART_7 14
779#define _HIPART_7 15
780#define _LOPART_8 16
781#define _HIPART_8 17
782#define _LOPART_9 18
783#define _HIPART_9 19
784#define _LOPART_10 20
785#define _HIPART_10 21
786#define _LOPART_11 22
787#define _HIPART_11 23
788#define _LOPART_12 24
789#define _HIPART_12 25
790#define _LOPART_13 26
791#define _HIPART_13 27
792#define _LOPART_14 28
793#define _HIPART_14 29
794#define _LOPART_15 30
795#define _HIPART_15 31
796
797// Return the register number of the pair containing register n, i.e.,
798// floor(n/2).
799#define _PAIR(n) _GLUE(_PAIR_, n)
800
801// Internal macros: `_PAIR_n' returns the register number of the pair
802// containing register n, i.e., floor(n/2).
803#define _PAIR_0 0
804#define _PAIR_1 0
805#define _PAIR_2 1
806#define _PAIR_3 1
807#define _PAIR_4 2
808#define _PAIR_5 2
809#define _PAIR_6 3
810#define _PAIR_7 3
811#define _PAIR_8 4
812#define _PAIR_9 4
813#define _PAIR_10 5
814#define _PAIR_11 5
815#define _PAIR_12 6
816#define _PAIR_13 6
817#define _PAIR_14 7
818#define _PAIR_15 7
819#define _PAIR_16 8
820#define _PAIR_17 8
821#define _PAIR_18 9
822#define _PAIR_19 9
823#define _PAIR_20 10
824#define _PAIR_21 10
825#define _PAIR_22 11
826#define _PAIR_23 11
827#define _PAIR_24 12
828#define _PAIR_25 12
829#define _PAIR_26 13
830#define _PAIR_27 13
831#define _PAIR_28 14
832#define _PAIR_29 14
833#define _PAIR_30 15
834#define _PAIR_31 15
835
836// Apply decoration decor to register number n of type ty. Decorations are
837// as follows.
838//
839// decor types meaning
840// Q s, d the NEON qN register containing this one
841// D s the NEON dN register containing this one
842// D0 q the low 64-bit half of this one
843// D1 q the high 64-bit half of this one
844// S0 d, q the first 32-bit piece of this one
845// S1 d, q the second 32-bit piece of this one
846// S2 q the third 32-bit piece of this one
847// S3 q the fourth 32-bit piece of this one
848// Bn q the nth byte of this register, as a scalar
849// Hn q the nth halfword of this register, as a scalar
850// Wn q the nth word of this register, as a scalar
851#define _DECOR(ty, decor, n) _DECOR_##ty##_##decor(n)
852
853// Internal macros: `_DECOR_ty_decor(n)' applies decoration decor to register
854// number n of type ty.
855
856#define _DECOR_s_Q(n) GLUE(q, _PAIR(_PAIR(n)))
857#define _DECOR_s_D(n) GLUE(d, _PAIR(n))
858
859#define _DECOR_d_Q(n) GLUE(q, _PAIR(n))
860#define _DECOR_d_S0(n) GLUE(s, _LOPART(n))
861#define _DECOR_d_S1(n) GLUE(s, _LOPART(n))
862
863#define _DECOR_q_D0(n) GLUE(d, _LOPART(n))
864#define _DECOR_q_D1(n) GLUE(d, _HIPART(n))
865#define _DECOR_q_S0(n) GLUE(s, _LOPART(_LOPART(n)))
866#define _DECOR_q_S1(n) GLUE(s, _HIPART(_LOPART(n)))
867#define _DECOR_q_S2(n) GLUE(s, _LOPART(_HIPART(n)))
868#define _DECOR_q_S3(n) GLUE(s, _HIPART(_HIPART(n)))
869#define _DECOR_q_W0(n) GLUE(d, _LOPART(n))[0]
870#define _DECOR_q_W1(n) GLUE(d, _LOPART(n))[1]
871#define _DECOR_q_W2(n) GLUE(d, _HIPART(n))[0]
872#define _DECOR_q_W3(n) GLUE(d, _HIPART(n))[1]
873#define _DECOR_q_H0(n) GLUE(d, _LOPART(n))[0]
874#define _DECOR_q_H1(n) GLUE(d, _LOPART(n))[1]
875#define _DECOR_q_H2(n) GLUE(d, _LOPART(n))[2]
876#define _DECOR_q_H3(n) GLUE(d, _LOPART(n))[3]
877#define _DECOR_q_H4(n) GLUE(d, _HIPART(n))[0]
878#define _DECOR_q_H5(n) GLUE(d, _HIPART(n))[1]
879#define _DECOR_q_H6(n) GLUE(d, _HIPART(n))[2]
880#define _DECOR_q_H7(n) GLUE(d, _HIPART(n))[3]
881#define _DECOR_q_B0(n) GLUE(d, _LOPART(n))[0]
882#define _DECOR_q_B1(n) GLUE(d, _LOPART(n))[1]
883#define _DECOR_q_B2(n) GLUE(d, _LOPART(n))[2]
884#define _DECOR_q_B3(n) GLUE(d, _LOPART(n))[3]
885#define _DECOR_q_B4(n) GLUE(d, _LOPART(n))[4]
886#define _DECOR_q_B5(n) GLUE(d, _LOPART(n))[5]
887#define _DECOR_q_B6(n) GLUE(d, _LOPART(n))[6]
888#define _DECOR_q_B7(n) GLUE(d, _LOPART(n))[7]
889#define _DECOR_q_B8(n) GLUE(d, _HIPART(n))[0]
890#define _DECOR_q_B9(n) GLUE(d, _HIPART(n))[1]
891#define _DECOR_q_B10(n) GLUE(d, _HIPART(n))[2]
892#define _DECOR_q_B11(n) GLUE(d, _HIPART(n))[3]
893#define _DECOR_q_B12(n) GLUE(d, _HIPART(n))[4]
894#define _DECOR_q_B13(n) GLUE(d, _HIPART(n))[5]
895#define _DECOR_q_B14(n) GLUE(d, _HIPART(n))[6]
896#define _DECOR_q_B15(n) GLUE(d, _HIPART(n))[7]
897
898// Macros for navigating the NEON register hierarchy.
899#define S0(reg) _REGFORM(reg, S0)
900#define S1(reg) _REGFORM(reg, S1)
901#define S2(reg) _REGFORM(reg, S2)
902#define S3(reg) _REGFORM(reg, S3)
903#define D(reg) _REGFORM(reg, D)
904#define D0(reg) _REGFORM(reg, D0)
905#define D1(reg) _REGFORM(reg, D1)
906#define Q(reg) _REGFORM(reg, Q)
907
908// Macros for indexing quadword registers.
909#define QB(reg, i) _REGFORM(reg, B##i)
910#define QH(reg, i) _REGFORM(reg, H##i)
911#define QW(reg, i) _REGFORM(reg, W##i)
912
913// Macros for converting vldm/vstm ranges.
914#define QQ(qlo, qhi) D0(qlo)-D1(qhi)
915
0923a413 916// Stack management and unwinding.
42c44b27 917.macro setfp fp=r11, offset=0
0923a413
MW		 918 .if \offset == 0
919 mov \fp, sp
920 .setfp \fp, sp
921 .else
922 add \fp, sp, #\offset
923 .setfp \fp, sp, #\offset
924 .endif
925 .macro dropfp; _dropfp \fp, \offset; .endm
926 .L$_frameptr_p = -1
927.endm
928
cdc153a5 929.macro _dropfp fp, offset=0
0923a413
MW		 930 .if \offset == 0
931 mov sp, \fp
932 .else
933 sub sp, \fp, #\offset
934 .endif
935 .purgem dropfp
936 .L$_frameptr_p = 0
937.endm
938
939.macro stalloc n
940 sub sp, sp, #\n
941 .pad #\n
942.endm
943
944.macro stfree n
945 add sp, sp, #\n
946 .pad #-\n
947.endm
948
949.macro pushreg rr:vararg
1f1fd884 950 push {\rr}
0923a413
MW		 951 .save {\rr}
952.endm
953
954.macro popreg rr:vararg
1f1fd884 955 pop {\rr}
0923a413
MW		 956.endm
957
958.macro pushvfp rr:vararg
959 vstmdb sp!, {\rr}
960 .vsave {\rr}
961.endm
962
963.macro popvfp rr:vararg
964 vldmia sp!, {\rr}
965.endm
966
967.macro endprologue
968.endm
969
970// No need for prologue markers on ARM.
971#define FUNC_POSTHOOK(_) .L$_prologue_p = -1
972
61bd904b
MW		 973#endif
974
975///--------------------------------------------------------------------------
e492db88
MW		 976/// AArch64-specific hacking.
977
978#if CPUFAM_ARM64
979
980// Set the function hooks.
981#define FUNC_PREHOOK(_) .balign 4
982#define FUNC_POSTHOOK(_) .cfi_startproc; .L$_prologue_p = -1
983#define ENDFUNC_HOOK(_) .cfi_endproc
984
985// Call external subroutine at ADDR, possibly via PLT.
986.macro callext addr
987 bl \addr
988.endm
989
990// Load address of external symbol ADDR into REG.
991.macro leaext reg, addr
992#if WANT_PIC
993 adrp \reg, :got:\addr
994 ldr \reg, [\reg, #:got_lo12:\addr]
995#else
996 adrp \reg, \addr
997 add \reg, \reg, #:lo12:\addr
998#endif
999.endm
1000
1a031196
MW		 1001.macro vzero vz=v31
1002 // Set VZ (default v31) to zero.
1003 dup \vz\().4s, wzr
1004.endm
1005
1006.macro vshl128 vd, vn, nbit, vz=v31
1007 // Set VD to VN shifted left by NBIT. Assume VZ (default v31) is
1008 // all-bits-zero. NBIT must be a multiple of 8.
1009 .if \nbit&3 != 0
1010 .error "shift quantity must be whole number of bytes"
1011 .endif
1012 ext \vd\().16b, \vz\().16b, \vn\().16b, #16 - (\nbit >> 3)
1013.endm
1014
1015.macro vshr128 vd, vn, nbit, vz=v31
1016 // Set VD to VN shifted right by NBIT. Assume VZ (default v31) is
1017 // all-bits-zero. NBIT must be a multiple of 8.
1018 .if \nbit&3 != 0
1019 .error "shift quantity must be whole number of bytes"
1020 .endif
1021 ext \vd\().16b, \vn\().16b, \vz\().16b, #\nbit >> 3
1022.endm
1023
e492db88 1024// Stack management and unwinding.
42c44b27 1025.macro setfp fp=x29, offset=0
e492db88
MW		 1026 // If you're just going through the motions with a fixed-size stack frame,
1027 // then you want to say `add x29, sp, #OFFSET' directly, which will avoid
1028 // pointlessly restoring sp later.
1029 .if \offset == 0
1030 mov \fp, sp
1031 .cfi_def_cfa_register \fp
1032 .else
1033 add \fp, sp, #\offset
1034 .cfi_def_cfa_register \fp
1035 .cfi_adjust_cfa_offset -\offset
1036 .endif
1037 .macro dropfp; _dropfp \fp, \offset; .endm
1038 .L$_frameptr_p = -1
1039.endm
1040
cdc153a5 1041.macro _dropfp fp, offset=0
e492db88
MW		 1042 .if \offset == 0
1043 mov sp, \fp
1044 .cfi_def_cfa_register sp
1045 .else
1046 sub sp, \fp, #\offset
1047 .cfi_def_cfa_register sp
1048 .cfi_adjust_cfa_offset +\offset
1049 .endif
1050 .purgem dropfp
1051 .L$_frameptr_p = 0
1052.endm
1053
1054.macro stalloc n
1055 sub sp, sp, #\n
1056 .cfi_adjust_cfa_offset +\n
1057.endm
1058
1059.macro stfree n
1060 add sp, sp, #\n
1061 .cfi_adjust_cfa_offset -\n
1062.endm
1063
4bf3072e
MW		 1064.macro pushreg x, y=nil
1065 .ifeqs "\y", "nil"
e492db88
MW		 1066 str \x, [sp, #-16]!
1067 .cfi_adjust_cfa_offset +16
1068 .cfi_rel_offset \x, 0
1069 .else
1070 stp \x, \y, [sp, #-16]!
1071 .cfi_adjust_cfa_offset +16
1072 .cfi_rel_offset \x, 0
1073 .cfi_rel_offset \y, 8
1074 .endif
1075.endm
1076
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MW		 1077.macro popreg x, y=nil
1078 .ifeqs "\y", "nil"
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MW		 1079 ldr \x, [sp], #16
1080 .cfi_restore \x
1081 .cfi_adjust_cfa_offset -16
1082 .else
1083 ldp \x, \y, [sp], #16
1084 .cfi_restore \x
1085 .cfi_restore \y
1086 .cfi_adjust_cfa_offset -16
1087 .endif
1088.endm
1089
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MW		 1090.macro savereg x, y, z=nil
1091 .ifeqs "\z", "nil"
1092 str \x, [sp, \y]
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MW		 1093 .cfi_rel_offset \x, \y
1094 .else
1095 stp \x, \y, [sp, #\z]
1096 .cfi_rel_offset \x, \z
1097 .cfi_rel_offset \y, \z + 8
1098 .endif
1099.endm
1100
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MW		 1101.macro rstrreg x, y, z=nil
1102 .ifeqs "\z", "nil"
1103 ldr \x, [sp, \y]
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MW		 1104 .cfi_restore \x
1105 .else
1106 ldp \x, \y, [sp, #\z]
1107 .cfi_restore \x
1108 .cfi_restore \y
1109 .endif
1110.endm
1111
1112.macro endprologue
1113.endm
1114
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MW		 1115// cmov RD, RN, CC: set RD to RN if CC is satisfied, otherwise do nothing
1116.macro cmov rd, rn, cc
1117 csel \rd, \rn, \rd, \cc
1118.endm
1119
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MW		 1120// Notational improvement: write `csel.CC' etc., rather than `csel ..., CC'.
1121#define _COND(_) \
1122 _(eq) _(ne) _(cs) _(cc) _(vs) _(vc) _(mi) _(pl) \
1123 _(ge) _(lt) _(gt) _(le) _(hi) _(ls) _(al) _(nv) \
1124 _(hs) _(lo)
1125#define _INST(_) \
1126 _(ccmp) _(ccmn) \
5f49478b 1127 _(csel) _(cmov) \
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MW		 1128 _(csinc) _(cinc) _(cset) \
1129 _(csneg) _(cneg) \
1130 _(csinv) _(cinv) _(csetm)
1131#define _CONDVAR(cc) _definstvar cc;
1132#define _INSTVARS(inst) \
1133 .macro _definstvar cc; \
1134 .macro inst.\cc args:vararg; inst \args, \cc; .endm; \
1135 .endm; \
1136 _COND(_CONDVAR); \
1137 .purgem _definstvar;
1138 _INST(_INSTVARS)
1139#undef _COND
1140#undef _INST
1141#undef _CONDVAR
1142#undef _INSTVARS
1143
1144// Flag bits for `ccmp' and friends.
1145#define CCMP_N 8
1146#define CCMP_Z 4
1147#define CCMP_C 2
1148#define CCMP_V 1
1149
1150// Flag settings for satisfying conditions.
1151#define CCMP_MI CCMP_N
1152#define CCMP_PL 0
1153#define CCMP_EQ CCMP_Z
1154#define CCMP_NE 0
1155#define CCMP_CS CCMP_C
1156#define CCMP_HS CCMP_C
1157#define CCMP_CC 0
1158#define CCMP_LO 0
1159#define CCMP_VS CCMP_V
1160#define CCMP_VC 0
1161#define CCMP_HI CCMP_C
1162#define CCMP_LS 0
1163#define CCMP_LT CCMP_N
1164#define CCMP_GE 0
1165#define CCMP_LE CCMP_N
1166#define CCMP_GT 0
1167
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MW		 1168#endif
1169
1170///--------------------------------------------------------------------------
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MW		 1171/// Final stuff.
1172
1173// Default values for the various hooks.
1174#ifndef FUNC_PREHOOK
1e5664a6 1175# define FUNC_PREHOOK(_)
1a0c09c4
MW		 1176#endif
1177#ifndef FUNC_POSTHOOK
1e5664a6 1178# define FUNC_POSTHOOK(_)
1a0c09c4
MW		 1179#endif
1180#ifndef ENDFUNC_HOOK
1e5664a6 1181# define ENDFUNC_HOOK(_)
1a0c09c4
MW		 1182#endif
1183
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MW		 1184// Section selection.
1185#ifndef TEXT
1186# define TEXT .text .L$_subsec
1187#endif
1188#ifndef RODATA
1189# define RODATA TEXT
1190#endif
1191#ifndef DATA
1192# define DATA .data
1193#endif
1194
1195// Symbol decoration.
1a0c09c4 1196#ifndef F
772740dd
MW		 1197# ifdef SYM_USCORE
1198# define F(name) _##name
1199# else
1200# define F(name) name
1201# endif
1a0c09c4
MW		 1202#endif
1203
1204#ifndef TYPE_FUNC
1205# define TYPE_FUNC(name)
1206#endif
6ae7b854
MW		 1207#ifndef TYPE_OBJ
1208# define TYPE_OBJ(name)
1209#endif
1a0c09c4
MW		 1210#ifndef SIZE_OBJ
1211# define SIZE_OBJ(name)
1212#endif
1213
9ce6487b 1214#if __ELF__ && !defined(FORCE_EXECUTABLE_STACK)
1aa5bfa8
MW		 1215 .pushsection .note.GNU-stack, "", _SECTTY(progbits)
1216 .popsection
1217#endif
1218
1a0c09c4 1219///----- That's all, folks --------------------------------------------------
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MW		 1220
1221#endif
Catacomb cryptographic library