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base/asm-common.h (x86), and knock-on: Add macros for full-size regs.
[catacomb] / base / asm-common.h
CommitLineData
1a0c09c4
MW		 1/// -*- mode: asm; asm-comment-char: ?/ -*-
2///
08b868da 3/// Common definitions for asesembler source files
1a0c09c4
MW		 4///
5/// (c) 2015 Straylight/Edgeware
6///
7
8///----- Licensing notice ---------------------------------------------------
9///
10/// This file is part of Catacomb.
11///
12/// Catacomb is free software; you can redistribute it and/or modify
13/// it under the terms of the GNU Library General Public License as
14/// published by the Free Software Foundation; either version 2 of the
15/// License, or (at your option) any later version.
16///
17/// Catacomb is distributed in the hope that it will be useful,
18/// but WITHOUT ANY WARRANTY; without even the implied warranty of
19/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20/// GNU Library General Public License for more details.
21///
22/// You should have received a copy of the GNU Library General Public
23/// License along with Catacomb; if not, write to the Free
24/// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25/// MA 02111-1307, USA.
26
8ce88ea5
MW		 27#ifndef CATACOMB_ASM_COMMON_H
28#define CATACOMB_ASM_COMMON_H
29
1a0c09c4
MW		 30///--------------------------------------------------------------------------
31/// General definitions.
32
898f32b3
MW		 33// Preprocessor hacks.
34#define STRINGY(x) _STRINGY(x, y)
35#define _STRINGY(x) #x
36#define GLUE(x, y) _GLUE(x, y)
37#define _GLUE(x, y) x##y
38#define _EMPTY
39
f8e509a9
MW		 40// Some useful variables.
41 .L$_subsec = 0
42
43// Literal pools done the hard way.
44#define _LIT .text .L$_subsec + 1
45#define _ENDLIT .text .L$_subsec
6c54cbd3 46#define _LTORG .L$_subsec = .L$_subsec + 2; .text .L$_subsec
f8e509a9 47
645fcce0
MW		 48// ELF section types.
49#if __ELF__
50# if CPUFAM_ARMEL
51# define _SECTTY(ty) %ty
52# else
53# define _SECTTY(ty) @ty
54# endif
55#endif
56
57// Section selection.
58#define TEXT .text .L$_subsec
59#if ABI_WIN
60# define RODATA .section .rdata, "dr"
61#elif __ELF__
62# define RODATA .section .rodata, "a", _SECTTY(progbits)
63#else
64# define RODATA TEXT
65#endif
66#define DATA .data
67
1a517bb3
MW		 68// Announcing an internal function.
69#define INTFUNC(name) \
1a0c09c4 70 TYPE_FUNC(name); \
8a1aa284 71 .macro ENDFUNC; _ENDFUNC(name); .endm; \
0923a413 72 .L$_prologue_p = 0; .L$_frameptr_p = 0; \
1a0c09c4 73 FUNC_PREHOOK(name); \
1a517bb3 74name: \
1a0c09c4
MW		 75 FUNC_POSTHOOK(name)
76
1a517bb3
MW		 77// Announcing an external function.
78#define FUNC(name) \
79 .globl F(name); \
80INTFUNC(F(name))
81
1a0c09c4
MW		 82// Marking the end of a function.
83#define _ENDFUNC(name) \
0923a413
MW		 84 .if ~ .L$_prologue_p; .error "Missing `endprologue'"; .endif; \
85 .if .L$_frameptr_p; .purgem dropfp; .endif; \
1a0c09c4
MW		 86 .purgem ENDFUNC; \
87 SIZE_OBJ(name); \
f8e509a9 88 ENDFUNC_HOOK(name); \
6c54cbd3 89 _LTORG
1a0c09c4 90
8ae4c946
MW		 91// Make a helper function, if necessary.
92#define AUXFN(name) \
93 .ifndef .L$_auxfn_def.name; \
94 .text 7128; \
95 .macro _ENDAUXFN; _ENDAUXFN_TAIL(name); .endm; \
96 FUNC_PREHOOK(name); \
97name:
98#define _ENDAUXFN_TAIL(name) \
99 .purgem _ENDAUXFN; \
100 .text .L$_subsec; \
101 .L$_auxfn_def.name = 1
102#define ENDAUXFN _ENDAUXFN; .endif
103
1a0c09c4
MW		 104///--------------------------------------------------------------------------
105/// ELF-specific hacking.
106
107#if __ELF__
108
109#if __PIC__ || __PIE__
110# define WANT_PIC 1
111#endif
112
113#define TYPE_FUNC(name) .type name, STT_FUNC
114
115#define SIZE_OBJ(name) .size name, . - name
116
117#endif
118
119///--------------------------------------------------------------------------
0f23f75f
MW		 120/// Windows-specific hacking.
121
122#if ABI_WIN
1a0c09c4
MW		 123
124#if CPUFAM_X86
0f23f75f
MW		 125# define F(name) _##name
126#endif
127
128#endif
129
130///--------------------------------------------------------------------------
131/// x86- and amd64-specific hacking.
132///
133/// It's (slightly) easier to deal with both of these in one go.
134
135#if CPUFAM_X86 || CPUFAM_AMD64
1a0c09c4 136
2cb17e02
MW		 137// Word size.
138#if CPUFAM_X86
139# define WORDSZ 4
140#endif
141#if CPUFAM_AMD64
142# define WORDSZ 8
143#endif
144
1a0c09c4
MW		 145// Set the function hooks.
146#define FUNC_PREHOOK(_) .balign 16
147
f71dd54d
MW		 148// On Windows, arrange to install stack-unwinding data.
149#if CPUFAM_AMD64 && ABI_WIN
150# define FUNC_POSTHOOK(name) .seh_proc name
151# define ENDFUNC_HOOK(_) .seh_endproc
152// Procedures are expected to invoke `.seh_setframe' if necessary, and
153// `.seh_pushreg' and friends, and `.seh_endprologue'.
154#endif
155
0923a413
MW		 156#if __ELF__
157# define FUNC_POSTHOOK(_) .cfi_startproc
158# define ENDFUNC_HOOK(_) .cfi_endproc
159#endif
160
1a0c09c4
MW		 161// Don't use the wretched AT&T syntax. It's festooned with pointless
162// punctuation, and all of the data movement is backwards. Ugh!
163 .intel_syntax noprefix
164
165// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 166.macro callext addr
1a0c09c4
MW		 167#if WANT_PIC
168 call \addr@PLT
169#else
170 call \addr
171#endif
8a1aa284 172.endm
1a0c09c4
MW		 173
174// Do I need to arrange a spare GOT register?
175#if WANT_PIC && CPUFAM_X86
176# define NEED_GOT 1
177#endif
178#define GOTREG ebx // Not needed in AMD64 so don't care.
179
180// Maybe load GOT address into GOT.
8a1aa284 181.macro ldgot got=GOTREG
0f23f75f 182#if WANT_PIC && CPUFAM_X86
8ae4c946 183 AUXFN(_ldgot.\got)
1a0c09c4
MW		 184 mov \got, [esp]
185 ret
8ae4c946
MW		 186 ENDAUXFN
187 call _ldgot.\got
188 add \got, offset _GLOBAL_OFFSET_TABLE_
1a0c09c4 189#endif
8a1aa284 190.endm
1a0c09c4
MW		 191
192// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 193.macro leaext reg, addr, got=GOTREG
1a0c09c4 194#if WANT_PIC
0f23f75f 195# if CPUFAM_X86
1a0c09c4 196 mov \reg, [\got + \addr@GOT]
0f23f75f
MW		 197# endif
198# if CPUFAM_AMD64
199 mov \reg, \addr@GOTPCREL[rip]
200# endif
1a0c09c4 201#else
0f23f75f 202# if CPUFAM_X86
1a0c09c4 203 mov \reg, offset \addr
0f23f75f
MW		 204# endif
205# if CPUFAM_AMD64
206 lea \reg, \addr[rip]
207# endif
1a0c09c4 208#endif
8a1aa284 209.endm
1a0c09c4
MW		 210
211// Address expression (possibly using a base register, and a displacement)
212// referring to ADDR, which is within our module, maybe using GOT.
213#define INTADDR(...) INTADDR__0(__VA_ARGS__, GOTREG, dummy)
214#define INTADDR__0(addr, got, ...) INTADDR__1(addr, got)
0f23f75f
MW		 215#if CPUFAM_AMD64
216# define INTADDR__1(addr, got) addr + rip
217#elif WANT_PIC
1a0c09c4
MW		 218# define INTADDR__1(addr, got) got + addr@GOTOFF
219#else
220# define INTADDR__1(addr, got) addr
221#endif
222
a117c06f
MW		 223// Permutations for SIMD instructions. SHUF(A, B, C, D) is an immediate,
224// suitable for use in `pshufd' or `shufpd', which copies element A
225// (0 <= A < 4) of the source to element 0 of the destination, element B to
226// element 1, element C to element 2, and element D to element 3.
227#define SHUF(a, b, c, d) ((a) + 4*(b) + 16*(c) + 64*(d))
a13b5730 228
43ea7558
MW		 229// Map register names to their individual pieces.
230
231// Apply decoration decor to (internal) register name reg of type ty.
232//
233// See `R_...' for internal register names. Decorations are as follows.
234//
235// b low byte (e.g., `al', `r8b')
236// h high byte (e.g., `ah')
237// w word (e.g., `ax', `r8w')
238// d doubleword (e.g., `eax', `r8d')
239// q quadword (e.g., `rax', `r8')
240// r whole register (doubleword on x86, quadword on amd64)
241//
242// And types are as follows.
243//
244// abcd the four traditional registers `a', `b', `c', `d'
245// xp the four pointer registers `si', `di', `bp', `sp'
246// ip the instruction pointer `ip'
247// rn the AMD64 numbered registers `r8'--`r15'
248#define _DECOR(ty, decor, reg) _DECOR_##ty##_##decor(reg)
249
250// Internal macros: _DECOR_ty_decor(reg) applies decoration decor to
251// (internal) register name reg of type ty.
252
253#define _DECOR_abcd_b(reg) reg##l
254#define _DECOR_abcd_h(reg) reg##h
255#define _DECOR_abcd_w(reg) reg##x
256#define _DECOR_abcd_d(reg) e##reg##x
257#if CPUFAM_AMD64
258# define _DECOR_abcd_q(reg) r##reg##x
259#endif
260
43ea7558
MW		 261#define _DECOR_xp_w(reg) reg
262#define _DECOR_xp_d(reg) e##reg
263#if CPUFAM_AMD64
a105615f 264# define _DECOR_xp_b(reg) reg##l
43ea7558
MW		 265# define _DECOR_xp_q(reg) r##reg
266#endif
267
268#define _DECOR_ip_w(reg) reg
269#define _DECOR_ip_d(reg) e##reg
270#if CPUFAM_AMD64
271# define _DECOR_ip_q(reg) r##reg
272#endif
273
274#if CPUFAM_AMD64
275# define _DECOR_rn_b(reg) reg##b
276# define _DECOR_rn_w(reg) reg##w
277# define _DECOR_rn_d(reg) reg##d
278# define _DECOR_rn_q(reg) reg
279# define _DECOR_rn_r(reg) reg
280#endif
281
005cd277
MW		 282#define _DECOR_mem_b(addr) byte ptr addr
283#define _DECOR_mem_w(addr) word ptr addr
284#define _DECOR_mem_d(addr) dword ptr addr
285#if CPUFAM_AMD64
286# define _DECOR_mem_q(addr) qword ptr addr
287#endif
288
7e251005
MW		 289#define _DECOR_imm_b(imm) byte imm
290#define _DECOR_imm_w(imm) word imm
291#define _DECOR_imm_d(imm) dword imm
292#if CPUFAM_AMD64
293# define _DECOR_imm_q(imm) qword imm
294#endif
295
43ea7558
MW		 296#if CPUFAM_X86
297# define _DECOR_abcd_r(reg) e##reg##x
298# define _DECOR_xp_r(reg) e##reg
299# define _DECOR_ip_r(reg) e##reg
3c0490d1 300# define _DECOR_mem_r(addr) dword ptr addr
7e251005 301# define _DECOR_imm_r(imm) dword imm
43ea7558
MW		 302#endif
303#if CPUFAM_AMD64
304# define _DECOR_abcd_r(reg) r##reg##x
305# define _DECOR_xp_r(reg) r##reg
306# define _DECOR_ip_r(reg) r##reg
3c0490d1 307# define _DECOR_mem_r(addr) qword ptr addr
7e251005 308# define _DECOR_imm_r(imm) qword imm
43ea7558
MW		 309#endif
310
43ea7558
MW		 311// R_r(decor) applies decoration decor to register r, which is an internal
312// register name. The internal register names are: `ip', `a', `b', `c', `d',
313// `si', `di', `bp', `sp', `r8'--`r15'.
314#define R_ip(decor) _DECOR(ip, decor, ip)
315#define R_a(decor) _DECOR(abcd, decor, a)
316#define R_b(decor) _DECOR(abcd, decor, b)
317#define R_c(decor) _DECOR(abcd, decor, c)
318#define R_d(decor) _DECOR(abcd, decor, d)
319#define R_si(decor) _DECOR(xp, decor, si)
320#define R_di(decor) _DECOR(xp, decor, di)
321#define R_bp(decor) _DECOR(xp, decor, bp)
322#define R_sp(decor) _DECOR(xp, decor, sp)
323#if CPUFAM_AMD64
324# define R_r8(decor) _DECOR(rn, decor, r8)
325# define R_r9(decor) _DECOR(rn, decor, r9)
326# define R_r10(decor) _DECOR(rn, decor, r10)
327# define R_r11(decor) _DECOR(rn, decor, r11)
328# define R_r12(decor) _DECOR(rn, decor, r12)
329# define R_r13(decor) _DECOR(rn, decor, r13)
330# define R_r14(decor) _DECOR(rn, decor, r14)
331# define R_r15(decor) _DECOR(rn, decor, r15)
332#endif
333
334// Refer to an in-memory datum of the type implied by decor residing at
335// address addr (which should supply its own square-brackets).
336#define MEM(decor, addr) _DECOR(mem, decor, addr)
337
7e251005
MW		 338// Refer to an immediate datum of the type implied by decor.
339#define IMM(decor, imm) _DECOR(mem, decor, imm)
340
43ea7558
MW		 341// Applies decoration decor to assembler-level register name reg.
342#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
343
344// Internal macros: _REGFORM_r(decor) applies decoration decor to an
345// assembler-level register name, in place of any decoration that register
346// name has already.
347
348#define _REGFORM_ip(decor) R_ip(decor)
349#define _REGFORM_eip(decor) R_ip(decor)
350
351#define _REGFORM_a(decor) R_a(decor)
352#define _REGFORM_al(decor) R_a(decor)
353#define _REGFORM_ah(decor) R_a(decor)
354#define _REGFORM_ax(decor) R_a(decor)
355#define _REGFORM_eax(decor) R_a(decor)
356
357#define _REGFORM_b(decor) R_b(decor)
358#define _REGFORM_bl(decor) R_b(decor)
359#define _REGFORM_bh(decor) R_b(decor)
360#define _REGFORM_bx(decor) R_b(decor)
361#define _REGFORM_ebx(decor) R_b(decor)
362
363#define _REGFORM_c(decor) R_c(decor)
364#define _REGFORM_cl(decor) R_c(decor)
365#define _REGFORM_ch(decor) R_c(decor)
366#define _REGFORM_cx(decor) R_c(decor)
367#define _REGFORM_ecx(decor) R_c(decor)
368
369#define _REGFORM_d(decor) R_d(decor)
370#define _REGFORM_dl(decor) R_d(decor)
371#define _REGFORM_dh(decor) R_d(decor)
372#define _REGFORM_dx(decor) R_d(decor)
373#define _REGFORM_edx(decor) R_d(decor)
374
375#define _REGFORM_si(decor) R_si(decor)
376#define _REGFORM_sil(decor) R_si(decor)
377#define _REGFORM_esi(decor) R_si(decor)
378
379#define _REGFORM_di(decor) R_di(decor)
380#define _REGFORM_dil(decor) R_di(decor)
381#define _REGFORM_edi(decor) R_di(decor)
382
383#define _REGFORM_bp(decor) R_bp(decor)
384#define _REGFORM_bpl(decor) R_bp(decor)
385#define _REGFORM_ebp(decor) R_bp(decor)
386
387#define _REGFORM_sp(decor) R_sp(decor)
388#define _REGFORM_spl(decor) R_sp(decor)
389#define _REGFORM_esp(decor) R_sp(decor)
390
391#if CPUFAM_AMD64
392
393# define _REGFORM_rip(decor) R_ip(decor)
394# define _REGFORM_rsp(decor) R_sp(decor)
395# define _REGFORM_rbp(decor) R_bp(decor)
396# define _REGFORM_rdi(decor) R_di(decor)
397# define _REGFORM_rsi(decor) R_si(decor)
398# define _REGFORM_rdx(decor) R_d(decor)
399# define _REGFORM_rcx(decor) R_c(decor)
400# define _REGFORM_rbx(decor) R_b(decor)
401# define _REGFORM_rax(decor) R_a(decor)
402
403# define _REGFORM_r8(decor) R_r8(decor)
404# define _REGFORM_r8b(decor) R_r8(decor)
405# define _REGFORM_r8w(decor) R_r8(decor)
406# define _REGFORM_r8d(decor) R_r8(decor)
407
408# define _REGFORM_r9(decor) R_r9(decor)
409# define _REGFORM_r9b(decor) R_r9(decor)
410# define _REGFORM_r9w(decor) R_r9(decor)
411# define _REGFORM_r9d(decor) R_r9(decor)
412
413# define _REGFORM_r10(decor) R_r10(decor)
414# define _REGFORM_r10b(decor) R_r10(decor)
415# define _REGFORM_r10w(decor) R_r10(decor)
416# define _REGFORM_r10d(decor) R_r10(decor)
417
418# define _REGFORM_r11(decor) R_r11(decor)
419# define _REGFORM_r11b(decor) R_r11(decor)
420# define _REGFORM_r11w(decor) R_r11(decor)
421# define _REGFORM_r11d(decor) R_r11(decor)
422
423# define _REGFORM_r12(decor) R_r12(decor)
424# define _REGFORM_r12b(decor) R_r12(decor)
425# define _REGFORM_r12w(decor) R_r12(decor)
426# define _REGFORM_r12d(decor) R_r12(decor)
427
428# define _REGFORM_r13(decor) R_r13(decor)
429# define _REGFORM_r13b(decor) R_r13(decor)
430# define _REGFORM_r13w(decor) R_r13(decor)
431# define _REGFORM_r13d(decor) R_r13(decor)
432
433# define _REGFORM_r14(decor) R_r14(decor)
434# define _REGFORM_r14b(decor) R_r14(decor)
435# define _REGFORM_r14w(decor) R_r14(decor)
436# define _REGFORM_r14d(decor) R_r14(decor)
437
438# define _REGFORM_r15(decor) R_r15(decor)
439# define _REGFORM_r15b(decor) R_r15(decor)
440# define _REGFORM_r15w(decor) R_r15(decor)
441# define _REGFORM_r15d(decor) R_r15(decor)
442
443#endif
444
445// Macros for converting register names.
446#define BYTE(reg) _REGFORM(reg, b)
447#define HIBYTE(reg) _REGFORM(reg, h)
448#define WORD(reg) _REGFORM(reg, w)
449#define DWORD(reg) _REGFORM(reg, d)
450#if CPUFAM_AMD64
451# define QWORD(reg) _REGFORM(reg, q)
452#endif
453#define WHOLE(reg) _REGFORM(reg, r)
454
a90d420c
MW		 455// Macros for some common registers.
456#define AX R_a(r)
457#define BX R_b(r)
458#define CX R_c(r)
459#define DX R_d(r)
460#define SI R_si(r)
461#define DI R_di(r)
462#define BP R_bp(r)
463#define SP R_sp(r)
464
0923a413 465// Stack management and unwinding.
a90d420c 466.macro setfp fp=BP, offset=0
0923a413 467 .if \offset == 0
a90d420c 468 mov \fp, SP
0923a413
MW		 469#if __ELF__
470 .cfi_def_cfa_register \fp
471#endif
472#if ABI_WIN && CPUFAM_AMD64
473 .seh_setframe \fp, 0
474#endif
475 .else
a90d420c 476 lea \fp, [SP + \offset]
0923a413
MW		 477#if __ELF__
478 .cfi_def_cfa_register \fp
479 .cfi_adjust_cfa_offset -\offset
480#endif
481#if ABI_WIN && CPUFAM_AMD64
482 .seh_setframe \fp, \offset
483#endif
484 .endif
485 .L$_frameptr_p = -1
486 .macro dropfp; _dropfp \fp, \offset; .endm
487.endm
488
cdc153a5 489.macro _dropfp fp, offset=0
0923a413 490 .if \offset == 0
a90d420c 491 mov SP, \fp
0923a413 492#if __ELF__
a90d420c 493 .cfi_def_cfa_register SP
0923a413
MW		 494#endif
495 .else
a90d420c 496 lea SP, [\fp - \offset]
0923a413 497#if __ELF__
a90d420c 498 .cfi_def_cfa_register SP
0923a413
MW		 499 .cfi_adjust_cfa_offset +\offset
500#endif
501 .endif
502 .L$_frameptr_p = 0
503 .purgem dropfp
504.endm
505
506.macro stalloc n
a90d420c 507 sub SP, \n
0923a413
MW		 508#if __ELF__
509 .cfi_adjust_cfa_offset +\n
510#endif
511#if ABI_WIN && CPUFAM_AMD64
512 .seh_stackalloc \n
513#endif
514.endm
515
516.macro stfree n
a90d420c 517 add SP, \n
0923a413
MW		 518#if __ELF__
519 .cfi_adjust_cfa_offset -\n
520#endif
521.endm
522
523.macro pushreg r
524 push \r
525#if __ELF__
526 .cfi_adjust_cfa_offset +WORDSZ
527 .cfi_rel_offset \r, 0
528#endif
529#if ABI_WIN && CPUFAM_AMD64
530 .seh_pushreg \r
531#endif
532.endm
533
534.macro popreg r
535 pop \r
536#if __ELF__
537 .cfi_adjust_cfa_offset -WORDSZ
538 .cfi_restore \r
539#endif
540.endm
541
542.macro savexmm r, offset
a90d420c 543 movdqa [SP + \offset], \r
0923a413
MW		 544#if ABI_WIN && CPUFAM_AMD64
545 .seh_savexmm \r, \offset
546#endif
547.endm
548
549.macro rstrxmm r, offset
a90d420c 550 movdqa \r, [SP + \offset]
0923a413
MW		 551.endm
552
553.macro endprologue
554#if ABI_WIN && CPUFAM_AMD64
555 .seh_endprologue
556#endif
557 .L$_prologue_p = -1
558.endm
559
1a0c09c4
MW		 560#endif
561
562///--------------------------------------------------------------------------
61bd904b
MW		 563/// ARM-specific hacking.
564
59d86860 565#if CPUFAM_ARMEL
61bd904b 566
9f6eb05d
MW		 567// ARM/Thumb mode things. Use ARM by default.
568#define ARM .arm; .L$_pcoff = 8
569#define THUMB .thumb; .L$_pcoff = 4
570 ARM
571
61bd904b 572// Set the function hooks.
0923a413
MW		 573#define FUNC_PREHOOK(_) .balign 4; .fnstart
574#define ENDFUNC_HOOK(_) .fnend; .ltorg
61bd904b
MW		 575
576// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 577.macro callext addr, cond=
61bd904b
MW		 578#if WANT_PIC
579 bl\cond \addr(PLT)
580#else
581 bl\cond \addr
582#endif
8a1aa284 583.endm
61bd904b
MW		 584
585// Do I need to arrange a spare GOT register?
586#if WANT_PIC
587# define NEED_GOT 1
588#endif
589#define GOTREG r9
590
591// Maybe load GOT address into GOT.
8a1aa284 592.macro ldgot cond=, got=GOTREG
61bd904b 593#if WANT_PIC
adca2a18
MW		 594 ldr\cond \got, .L$_ldgot$\@
595.L$_ldgot_pc$\@:
2d03a881 596 add\cond \got, pc, \got
8a1aa284 597 _LIT
adca2a18
MW		 598 .balign 4
599.L$_ldgot$\@:
9f6eb05d 600 .word _GLOBAL_OFFSET_TABLE_ - .L$_ldgot_pc$\@ - .L$_pcoff
8a1aa284 601 _ENDLIT
61bd904b 602#endif
8a1aa284 603.endm
61bd904b
MW		 604
605// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 606.macro leaext reg, addr, cond=, got=GOTREG
61bd904b 607#if WANT_PIC
adca2a18 608 ldr\cond \reg, .L$_leaext$\@
2d03a881 609 ldr\cond \reg, [\got, \reg]
8a1aa284 610 _LIT
adca2a18
MW		 611 .balign 4
612.L$_leaext$\@:
613 .word \addr(GOT)
8a1aa284 614 _ENDLIT
61bd904b 615#else
2d03a881 616 ldr\cond \reg, =\addr
61bd904b 617#endif
8a1aa284 618.endm
61bd904b 619
0c53ac58 620// Load address of external symbol ADDR into REG directly.
8a1aa284 621.macro leaextq reg, addr, cond=
0c53ac58
MW		 622#if WANT_PIC
623 ldr\cond \reg, .L$_leaextq$\@
624.L$_leaextq_pc$\@:
b6db2017 625 .if .L$_pcoff == 8
0c53ac58 626 ldr\cond \reg, [pc, \reg]
b6db2017 627 .else
9f6eb05d
MW		 628 add\cond \reg, pc
629 ldr\cond \reg, [\reg]
b6db2017 630 .endif
8a1aa284 631 _LIT
0c53ac58
MW		 632 .balign 4
633.L$_leaextq$\@:
9f6eb05d 634 .word \addr(GOT_PREL) + (. - .L$_leaextq_pc$\@ - .L$_pcoff)
8a1aa284 635 _ENDLIT
0c53ac58
MW		 636#else
637 ldr\cond \reg, =\addr
638#endif
8a1aa284 639.endm
0c53ac58 640
1a031196
MW		 641.macro vzero vz=q15
642 // Set VZ (default q15) to zero.
643 vmov.u32 \vz, #0
644.endm
645
646.macro vshl128 vd, vn, nbit, vz=q15
647 // Set VD to VN shifted left by NBIT. Assume VZ (default q15) is
648 // all-bits-zero. NBIT must be a multiple of 8.
649 .if \nbit&3 != 0
650 .error "shift quantity must be whole number of bytes"
651 .endif
652 vext.8 \vd, \vz, \vn, #16 - (\nbit >> 3)
653.endm
654
655.macro vshr128 vd, vn, nbit, vz=q15
656 // Set VD to VN shifted right by NBIT. Assume VZ (default q15) is
657 // all-bits-zero. NBIT must be a multiple of 8.
658 .if \nbit&3 != 0
659 .error "shift quantity must be whole number of bytes"
660 .endif
661 vext.8 \vd, \vn, \vz, #\nbit >> 3
662.endm
663
43ea7558
MW		 664// Apply decoration decor to register name reg.
665#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
666
667// Internal macros: `_REGFORM_r(decor)' applies decoration decor to register
668// name r.
669
670#define _REGFORM_s0(decor) _DECOR(s, decor, 0)
671#define _REGFORM_s1(decor) _DECOR(s, decor, 1)
672#define _REGFORM_s2(decor) _DECOR(s, decor, 2)
673#define _REGFORM_s3(decor) _DECOR(s, decor, 3)
674#define _REGFORM_s4(decor) _DECOR(s, decor, 4)
675#define _REGFORM_s5(decor) _DECOR(s, decor, 5)
676#define _REGFORM_s6(decor) _DECOR(s, decor, 6)
677#define _REGFORM_s7(decor) _DECOR(s, decor, 7)
678#define _REGFORM_s8(decor) _DECOR(s, decor, 8)
679#define _REGFORM_s9(decor) _DECOR(s, decor, 9)
680#define _REGFORM_s10(decor) _DECOR(s, decor, 10)
681#define _REGFORM_s11(decor) _DECOR(s, decor, 11)
682#define _REGFORM_s12(decor) _DECOR(s, decor, 12)
683#define _REGFORM_s13(decor) _DECOR(s, decor, 13)
684#define _REGFORM_s14(decor) _DECOR(s, decor, 14)
685#define _REGFORM_s15(decor) _DECOR(s, decor, 15)
686#define _REGFORM_s16(decor) _DECOR(s, decor, 16)
687#define _REGFORM_s17(decor) _DECOR(s, decor, 17)
688#define _REGFORM_s18(decor) _DECOR(s, decor, 18)
689#define _REGFORM_s19(decor) _DECOR(s, decor, 19)
690#define _REGFORM_s20(decor) _DECOR(s, decor, 20)
691#define _REGFORM_s21(decor) _DECOR(s, decor, 21)
692#define _REGFORM_s22(decor) _DECOR(s, decor, 22)
693#define _REGFORM_s23(decor) _DECOR(s, decor, 23)
694#define _REGFORM_s24(decor) _DECOR(s, decor, 24)
695#define _REGFORM_s25(decor) _DECOR(s, decor, 25)
696#define _REGFORM_s26(decor) _DECOR(s, decor, 26)
697#define _REGFORM_s27(decor) _DECOR(s, decor, 27)
698#define _REGFORM_s28(decor) _DECOR(s, decor, 28)
699#define _REGFORM_s29(decor) _DECOR(s, decor, 29)
700#define _REGFORM_s30(decor) _DECOR(s, decor, 30)
701#define _REGFORM_s31(decor) _DECOR(s, decor, 31)
702
703#define _REGFORM_d0(decor) _DECOR(d, decor, 0)
704#define _REGFORM_d1(decor) _DECOR(d, decor, 1)
705#define _REGFORM_d2(decor) _DECOR(d, decor, 2)
706#define _REGFORM_d3(decor) _DECOR(d, decor, 3)
707#define _REGFORM_d4(decor) _DECOR(d, decor, 4)
708#define _REGFORM_d5(decor) _DECOR(d, decor, 5)
709#define _REGFORM_d6(decor) _DECOR(d, decor, 6)
710#define _REGFORM_d7(decor) _DECOR(d, decor, 7)
711#define _REGFORM_d8(decor) _DECOR(d, decor, 8)
712#define _REGFORM_d9(decor) _DECOR(d, decor, 9)
713#define _REGFORM_d10(decor) _DECOR(d, decor, 10)
714#define _REGFORM_d11(decor) _DECOR(d, decor, 11)
715#define _REGFORM_d12(decor) _DECOR(d, decor, 12)
716#define _REGFORM_d13(decor) _DECOR(d, decor, 13)
717#define _REGFORM_d14(decor) _DECOR(d, decor, 14)
718#define _REGFORM_d15(decor) _DECOR(d, decor, 15)
719#define _REGFORM_d16(decor) _DECOR(d, decor, 16)
720#define _REGFORM_d17(decor) _DECOR(d, decor, 17)
721#define _REGFORM_d18(decor) _DECOR(d, decor, 18)
722#define _REGFORM_d19(decor) _DECOR(d, decor, 19)
723#define _REGFORM_d20(decor) _DECOR(d, decor, 20)
724#define _REGFORM_d21(decor) _DECOR(d, decor, 21)
725#define _REGFORM_d22(decor) _DECOR(d, decor, 22)
726#define _REGFORM_d23(decor) _DECOR(d, decor, 23)
727#define _REGFORM_d24(decor) _DECOR(d, decor, 24)
728#define _REGFORM_d25(decor) _DECOR(d, decor, 25)
729#define _REGFORM_d26(decor) _DECOR(d, decor, 26)
730#define _REGFORM_d27(decor) _DECOR(d, decor, 27)
731#define _REGFORM_d28(decor) _DECOR(d, decor, 28)
732#define _REGFORM_d29(decor) _DECOR(d, decor, 29)
733#define _REGFORM_d30(decor) _DECOR(d, decor, 30)
734#define _REGFORM_d31(decor) _DECOR(d, decor, 31)
735
736#define _REGFORM_q0(decor) _DECOR(q, decor, 0)
737#define _REGFORM_q1(decor) _DECOR(q, decor, 1)
738#define _REGFORM_q2(decor) _DECOR(q, decor, 2)
739#define _REGFORM_q3(decor) _DECOR(q, decor, 3)
740#define _REGFORM_q4(decor) _DECOR(q, decor, 4)
741#define _REGFORM_q5(decor) _DECOR(q, decor, 5)
742#define _REGFORM_q6(decor) _DECOR(q, decor, 6)
743#define _REGFORM_q7(decor) _DECOR(q, decor, 7)
744#define _REGFORM_q8(decor) _DECOR(q, decor, 8)
745#define _REGFORM_q9(decor) _DECOR(q, decor, 9)
746#define _REGFORM_q10(decor) _DECOR(q, decor, 10)
747#define _REGFORM_q11(decor) _DECOR(q, decor, 11)
748#define _REGFORM_q12(decor) _DECOR(q, decor, 12)
749#define _REGFORM_q13(decor) _DECOR(q, decor, 13)
750#define _REGFORM_q14(decor) _DECOR(q, decor, 14)
751#define _REGFORM_q15(decor) _DECOR(q, decor, 15)
752
753// `_LOPART(n)' and `_HIPART(n)' return the numbers of the register halves of
754// register n, i.e., 2*n and 2*n + 1 respectively.
755#define _LOPART(n) _GLUE(_LOPART_, n)
756#define _HIPART(n) _GLUE(_HIPART_, n)
757
758// Internal macros: `_LOPART_n' and `_HIPART_n' return the numbers of the
759// register halves of register n, i.e., 2*n and 2*n + 1 respectively.
760
761#define _LOPART_0 0
762#define _HIPART_0 1
763#define _LOPART_1 2
764#define _HIPART_1 3
765#define _LOPART_2 4
766#define _HIPART_2 5
767#define _LOPART_3 6
768#define _HIPART_3 7
769#define _LOPART_4 8
770#define _HIPART_4 9
771#define _LOPART_5 10
772#define _HIPART_5 11
773#define _LOPART_6 12
774#define _HIPART_6 13
775#define _LOPART_7 14
776#define _HIPART_7 15
777#define _LOPART_8 16
778#define _HIPART_8 17
779#define _LOPART_9 18
780#define _HIPART_9 19
781#define _LOPART_10 20
782#define _HIPART_10 21
783#define _LOPART_11 22
784#define _HIPART_11 23
785#define _LOPART_12 24
786#define _HIPART_12 25
787#define _LOPART_13 26
788#define _HIPART_13 27
789#define _LOPART_14 28
790#define _HIPART_14 29
791#define _LOPART_15 30
792#define _HIPART_15 31
793
794// Return the register number of the pair containing register n, i.e.,
795// floor(n/2).
796#define _PAIR(n) _GLUE(_PAIR_, n)
797
798// Internal macros: `_PAIR_n' returns the register number of the pair
799// containing register n, i.e., floor(n/2).
800#define _PAIR_0 0
801#define _PAIR_1 0
802#define _PAIR_2 1
803#define _PAIR_3 1
804#define _PAIR_4 2
805#define _PAIR_5 2
806#define _PAIR_6 3
807#define _PAIR_7 3
808#define _PAIR_8 4
809#define _PAIR_9 4
810#define _PAIR_10 5
811#define _PAIR_11 5
812#define _PAIR_12 6
813#define _PAIR_13 6
814#define _PAIR_14 7
815#define _PAIR_15 7
816#define _PAIR_16 8
817#define _PAIR_17 8
818#define _PAIR_18 9
819#define _PAIR_19 9
820#define _PAIR_20 10
821#define _PAIR_21 10
822#define _PAIR_22 11
823#define _PAIR_23 11
824#define _PAIR_24 12
825#define _PAIR_25 12
826#define _PAIR_26 13
827#define _PAIR_27 13
828#define _PAIR_28 14
829#define _PAIR_29 14
830#define _PAIR_30 15
831#define _PAIR_31 15
832
833// Apply decoration decor to register number n of type ty. Decorations are
834// as follows.
835//
836// decor types meaning
837// Q s, d the NEON qN register containing this one
838// D s the NEON dN register containing this one
839// D0 q the low 64-bit half of this one
840// D1 q the high 64-bit half of this one
841// S0 d, q the first 32-bit piece of this one
842// S1 d, q the second 32-bit piece of this one
843// S2 q the third 32-bit piece of this one
844// S3 q the fourth 32-bit piece of this one
845// Bn q the nth byte of this register, as a scalar
846// Hn q the nth halfword of this register, as a scalar
847// Wn q the nth word of this register, as a scalar
848#define _DECOR(ty, decor, n) _DECOR_##ty##_##decor(n)
849
850// Internal macros: `_DECOR_ty_decor(n)' applies decoration decor to register
851// number n of type ty.
852
853#define _DECOR_s_Q(n) GLUE(q, _PAIR(_PAIR(n)))
854#define _DECOR_s_D(n) GLUE(d, _PAIR(n))
855
856#define _DECOR_d_Q(n) GLUE(q, _PAIR(n))
857#define _DECOR_d_S0(n) GLUE(s, _LOPART(n))
858#define _DECOR_d_S1(n) GLUE(s, _LOPART(n))
859
860#define _DECOR_q_D0(n) GLUE(d, _LOPART(n))
861#define _DECOR_q_D1(n) GLUE(d, _HIPART(n))
862#define _DECOR_q_S0(n) GLUE(s, _LOPART(_LOPART(n)))
863#define _DECOR_q_S1(n) GLUE(s, _HIPART(_LOPART(n)))
864#define _DECOR_q_S2(n) GLUE(s, _LOPART(_HIPART(n)))
865#define _DECOR_q_S3(n) GLUE(s, _HIPART(_HIPART(n)))
866#define _DECOR_q_W0(n) GLUE(d, _LOPART(n))[0]
867#define _DECOR_q_W1(n) GLUE(d, _LOPART(n))[1]
868#define _DECOR_q_W2(n) GLUE(d, _HIPART(n))[0]
869#define _DECOR_q_W3(n) GLUE(d, _HIPART(n))[1]
870#define _DECOR_q_H0(n) GLUE(d, _LOPART(n))[0]
871#define _DECOR_q_H1(n) GLUE(d, _LOPART(n))[1]
872#define _DECOR_q_H2(n) GLUE(d, _LOPART(n))[2]
873#define _DECOR_q_H3(n) GLUE(d, _LOPART(n))[3]
874#define _DECOR_q_H4(n) GLUE(d, _HIPART(n))[0]
875#define _DECOR_q_H5(n) GLUE(d, _HIPART(n))[1]
876#define _DECOR_q_H6(n) GLUE(d, _HIPART(n))[2]
877#define _DECOR_q_H7(n) GLUE(d, _HIPART(n))[3]
878#define _DECOR_q_B0(n) GLUE(d, _LOPART(n))[0]
879#define _DECOR_q_B1(n) GLUE(d, _LOPART(n))[1]
880#define _DECOR_q_B2(n) GLUE(d, _LOPART(n))[2]
881#define _DECOR_q_B3(n) GLUE(d, _LOPART(n))[3]
882#define _DECOR_q_B4(n) GLUE(d, _LOPART(n))[4]
883#define _DECOR_q_B5(n) GLUE(d, _LOPART(n))[5]
884#define _DECOR_q_B6(n) GLUE(d, _LOPART(n))[6]
885#define _DECOR_q_B7(n) GLUE(d, _LOPART(n))[7]
886#define _DECOR_q_B8(n) GLUE(d, _HIPART(n))[0]
887#define _DECOR_q_B9(n) GLUE(d, _HIPART(n))[1]
888#define _DECOR_q_B10(n) GLUE(d, _HIPART(n))[2]
889#define _DECOR_q_B11(n) GLUE(d, _HIPART(n))[3]
890#define _DECOR_q_B12(n) GLUE(d, _HIPART(n))[4]
891#define _DECOR_q_B13(n) GLUE(d, _HIPART(n))[5]
892#define _DECOR_q_B14(n) GLUE(d, _HIPART(n))[6]
893#define _DECOR_q_B15(n) GLUE(d, _HIPART(n))[7]
894
895// Macros for navigating the NEON register hierarchy.
896#define S0(reg) _REGFORM(reg, S0)
897#define S1(reg) _REGFORM(reg, S1)
898#define S2(reg) _REGFORM(reg, S2)
899#define S3(reg) _REGFORM(reg, S3)
900#define D(reg) _REGFORM(reg, D)
901#define D0(reg) _REGFORM(reg, D0)
902#define D1(reg) _REGFORM(reg, D1)
903#define Q(reg) _REGFORM(reg, Q)
904
905// Macros for indexing quadword registers.
906#define QB(reg, i) _REGFORM(reg, B##i)
907#define QH(reg, i) _REGFORM(reg, H##i)
908#define QW(reg, i) _REGFORM(reg, W##i)
909
910// Macros for converting vldm/vstm ranges.
911#define QQ(qlo, qhi) D0(qlo)-D1(qhi)
912
0923a413 913// Stack management and unwinding.
42c44b27 914.macro setfp fp=r11, offset=0
0923a413
MW		 915 .if \offset == 0
916 mov \fp, sp
917 .setfp \fp, sp
918 .else
919 add \fp, sp, #\offset
920 .setfp \fp, sp, #\offset
921 .endif
922 .macro dropfp; _dropfp \fp, \offset; .endm
923 .L$_frameptr_p = -1
924.endm
925
cdc153a5 926.macro _dropfp fp, offset=0
0923a413
MW		 927 .if \offset == 0
928 mov sp, \fp
929 .else
930 sub sp, \fp, #\offset
931 .endif
932 .purgem dropfp
933 .L$_frameptr_p = 0
934.endm
935
936.macro stalloc n
937 sub sp, sp, #\n
938 .pad #\n
939.endm
940
941.macro stfree n
942 add sp, sp, #\n
943 .pad #-\n
944.endm
945
946.macro pushreg rr:vararg
1f1fd884 947 push {\rr}
0923a413
MW		 948 .save {\rr}
949.endm
950
951.macro popreg rr:vararg
1f1fd884 952 pop {\rr}
0923a413
MW		 953.endm
954
955.macro pushvfp rr:vararg
956 vstmdb sp!, {\rr}
957 .vsave {\rr}
958.endm
959
960.macro popvfp rr:vararg
961 vldmia sp!, {\rr}
962.endm
963
964.macro endprologue
965.endm
966
967// No need for prologue markers on ARM.
968#define FUNC_POSTHOOK(_) .L$_prologue_p = -1
969
61bd904b
MW		 970#endif
971
972///--------------------------------------------------------------------------
e492db88
MW		 973/// AArch64-specific hacking.
974
975#if CPUFAM_ARM64
976
977// Set the function hooks.
978#define FUNC_PREHOOK(_) .balign 4
979#define FUNC_POSTHOOK(_) .cfi_startproc; .L$_prologue_p = -1
980#define ENDFUNC_HOOK(_) .cfi_endproc
981
982// Call external subroutine at ADDR, possibly via PLT.
983.macro callext addr
984 bl \addr
985.endm
986
987// Load address of external symbol ADDR into REG.
988.macro leaext reg, addr
989#if WANT_PIC
990 adrp \reg, :got:\addr
991 ldr \reg, [\reg, #:got_lo12:\addr]
992#else
993 adrp \reg, \addr
994 add \reg, \reg, #:lo12:\addr
995#endif
996.endm
997
1a031196
MW		 998.macro vzero vz=v31
999 // Set VZ (default v31) to zero.
1000 dup \vz\().4s, wzr
1001.endm
1002
1003.macro vshl128 vd, vn, nbit, vz=v31
1004 // Set VD to VN shifted left by NBIT. Assume VZ (default v31) is
1005 // all-bits-zero. NBIT must be a multiple of 8.
1006 .if \nbit&3 != 0
1007 .error "shift quantity must be whole number of bytes"
1008 .endif
1009 ext \vd\().16b, \vz\().16b, \vn\().16b, #16 - (\nbit >> 3)
1010.endm
1011
1012.macro vshr128 vd, vn, nbit, vz=v31
1013 // Set VD to VN shifted right by NBIT. Assume VZ (default v31) is
1014 // all-bits-zero. NBIT must be a multiple of 8.
1015 .if \nbit&3 != 0
1016 .error "shift quantity must be whole number of bytes"
1017 .endif
1018 ext \vd\().16b, \vn\().16b, \vz\().16b, #\nbit >> 3
1019.endm
1020
e492db88 1021// Stack management and unwinding.
42c44b27 1022.macro setfp fp=x29, offset=0
e492db88
MW		 1023 // If you're just going through the motions with a fixed-size stack frame,
1024 // then you want to say `add x29, sp, #OFFSET' directly, which will avoid
1025 // pointlessly restoring sp later.
1026 .if \offset == 0
1027 mov \fp, sp
1028 .cfi_def_cfa_register \fp
1029 .else
1030 add \fp, sp, #\offset
1031 .cfi_def_cfa_register \fp
1032 .cfi_adjust_cfa_offset -\offset
1033 .endif
1034 .macro dropfp; _dropfp \fp, \offset; .endm
1035 .L$_frameptr_p = -1
1036.endm
1037
cdc153a5 1038.macro _dropfp fp, offset=0
e492db88
MW		 1039 .if \offset == 0
1040 mov sp, \fp
1041 .cfi_def_cfa_register sp
1042 .else
1043 sub sp, \fp, #\offset
1044 .cfi_def_cfa_register sp
1045 .cfi_adjust_cfa_offset +\offset
1046 .endif
1047 .purgem dropfp
1048 .L$_frameptr_p = 0
1049.endm
1050
1051.macro stalloc n
1052 sub sp, sp, #\n
1053 .cfi_adjust_cfa_offset +\n
1054.endm
1055
1056.macro stfree n
1057 add sp, sp, #\n
1058 .cfi_adjust_cfa_offset -\n
1059.endm
1060
4bf3072e
MW		 1061.macro pushreg x, y=nil
1062 .ifeqs "\y", "nil"
e492db88
MW		 1063 str \x, [sp, #-16]!
1064 .cfi_adjust_cfa_offset +16
1065 .cfi_rel_offset \x, 0
1066 .else
1067 stp \x, \y, [sp, #-16]!
1068 .cfi_adjust_cfa_offset +16
1069 .cfi_rel_offset \x, 0
1070 .cfi_rel_offset \y, 8
1071 .endif
1072.endm
1073
4bf3072e
MW		 1074.macro popreg x, y=nil
1075 .ifeqs "\y", "nil"
e492db88
MW		 1076 ldr \x, [sp], #16
1077 .cfi_restore \x
1078 .cfi_adjust_cfa_offset -16
1079 .else
1080 ldp \x, \y, [sp], #16
1081 .cfi_restore \x
1082 .cfi_restore \y
1083 .cfi_adjust_cfa_offset -16
1084 .endif
1085.endm
1086
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MW		 1087.macro savereg x, y, z=nil
1088 .ifeqs "\z", "nil"
1089 str \x, [sp, \y]
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MW		 1090 .cfi_rel_offset \x, \y
1091 .else
1092 stp \x, \y, [sp, #\z]
1093 .cfi_rel_offset \x, \z
1094 .cfi_rel_offset \y, \z + 8
1095 .endif
1096.endm
1097
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MW		 1098.macro rstrreg x, y, z=nil
1099 .ifeqs "\z", "nil"
1100 ldr \x, [sp, \y]
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MW		 1101 .cfi_restore \x
1102 .else
1103 ldp \x, \y, [sp, #\z]
1104 .cfi_restore \x
1105 .cfi_restore \y
1106 .endif
1107.endm
1108
1109.macro endprologue
1110.endm
1111
1112#endif
1113
1114///--------------------------------------------------------------------------
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MW		 1115/// Final stuff.
1116
1117// Default values for the various hooks.
1118#ifndef FUNC_PREHOOK
1e5664a6 1119# define FUNC_PREHOOK(_)
1a0c09c4
MW		 1120#endif
1121#ifndef FUNC_POSTHOOK
1e5664a6 1122# define FUNC_POSTHOOK(_)
1a0c09c4
MW		 1123#endif
1124#ifndef ENDFUNC_HOOK
1e5664a6 1125# define ENDFUNC_HOOK(_)
1a0c09c4
MW		 1126#endif
1127
1128#ifndef F
772740dd
MW		 1129# ifdef SYM_USCORE
1130# define F(name) _##name
1131# else
1132# define F(name) name
1133# endif
1a0c09c4
MW		 1134#endif
1135
1136#ifndef TYPE_FUNC
1137# define TYPE_FUNC(name)
1138#endif
1139
1140#ifndef SIZE_OBJ
1141# define SIZE_OBJ(name)
1142#endif
1143
91c8af7d 1144#if __ELF__ && !defined(WANT_EXECUTABLE_STACK)
1aa5bfa8
MW		 1145 .pushsection .note.GNU-stack, "", _SECTTY(progbits)
1146 .popsection
1147#endif
1148
1a0c09c4 1149///----- That's all, folks --------------------------------------------------
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MW		 1150
1151#endif
Catacomb cryptographic library