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base/asm-common.h: Decorate pseudoregister `nil' as `nil'.
[catacomb] / base / asm-common.h
CommitLineData
1a0c09c4
MW		 1/// -*- mode: asm; asm-comment-char: ?/ -*-
2///
08b868da 3/// Common definitions for asesembler source files
1a0c09c4
MW		 4///
5/// (c) 2015 Straylight/Edgeware
6///
7
8///----- Licensing notice ---------------------------------------------------
9///
10/// This file is part of Catacomb.
11///
12/// Catacomb is free software; you can redistribute it and/or modify
13/// it under the terms of the GNU Library General Public License as
14/// published by the Free Software Foundation; either version 2 of the
15/// License, or (at your option) any later version.
16///
17/// Catacomb is distributed in the hope that it will be useful,
18/// but WITHOUT ANY WARRANTY; without even the implied warranty of
19/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20/// GNU Library General Public License for more details.
21///
22/// You should have received a copy of the GNU Library General Public
23/// License along with Catacomb; if not, write to the Free
24/// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25/// MA 02111-1307, USA.
26
8ce88ea5
MW		 27#ifndef CATACOMB_ASM_COMMON_H
28#define CATACOMB_ASM_COMMON_H
29
1a0c09c4
MW		 30///--------------------------------------------------------------------------
31/// General definitions.
32
898f32b3
MW		 33// Preprocessor hacks.
34#define STRINGY(x) _STRINGY(x, y)
35#define _STRINGY(x) #x
36#define GLUE(x, y) _GLUE(x, y)
37#define _GLUE(x, y) x##y
38#define _EMPTY
39
f8e509a9
MW		 40// Some useful variables.
41 .L$_subsec = 0
42
43// Literal pools done the hard way.
44#define _LIT .text .L$_subsec + 1
45#define _ENDLIT .text .L$_subsec
6c54cbd3 46#define _LTORG .L$_subsec = .L$_subsec + 2; .text .L$_subsec
f8e509a9 47
645fcce0
MW		 48// ELF section types.
49#if __ELF__
50# if CPUFAM_ARMEL
51# define _SECTTY(ty) %ty
52# else
53# define _SECTTY(ty) @ty
54# endif
55#endif
56
57// Section selection.
58#define TEXT .text .L$_subsec
59#if ABI_WIN
60# define RODATA .section .rdata, "dr"
61#elif __ELF__
62# define RODATA .section .rodata, "a", _SECTTY(progbits)
63#else
64# define RODATA TEXT
65#endif
66#define DATA .data
67
1a517bb3
MW		 68// Announcing an internal function.
69#define INTFUNC(name) \
1a0c09c4 70 TYPE_FUNC(name); \
8a1aa284 71 .macro ENDFUNC; _ENDFUNC(name); .endm; \
0923a413 72 .L$_prologue_p = 0; .L$_frameptr_p = 0; \
1a0c09c4 73 FUNC_PREHOOK(name); \
1a517bb3 74name: \
1a0c09c4
MW		 75 FUNC_POSTHOOK(name)
76
1a517bb3
MW		 77// Announcing an external function.
78#define FUNC(name) \
79 .globl F(name); \
80INTFUNC(F(name))
81
1a0c09c4
MW		 82// Marking the end of a function.
83#define _ENDFUNC(name) \
0923a413
MW		 84 .if ~ .L$_prologue_p; .error "Missing `endprologue'"; .endif; \
85 .if .L$_frameptr_p; .purgem dropfp; .endif; \
1a0c09c4
MW		 86 .purgem ENDFUNC; \
87 SIZE_OBJ(name); \
f8e509a9 88 ENDFUNC_HOOK(name); \
6c54cbd3 89 _LTORG
1a0c09c4 90
8ae4c946
MW		 91// Make a helper function, if necessary.
92#define AUXFN(name) \
93 .ifndef .L$_auxfn_def.name; \
94 .text 7128; \
95 .macro _ENDAUXFN; _ENDAUXFN_TAIL(name); .endm; \
96 FUNC_PREHOOK(name); \
97name:
98#define _ENDAUXFN_TAIL(name) \
99 .purgem _ENDAUXFN; \
100 .text .L$_subsec; \
101 .L$_auxfn_def.name = 1
102#define ENDAUXFN _ENDAUXFN; .endif
103
1a0c09c4
MW		 104///--------------------------------------------------------------------------
105/// ELF-specific hacking.
106
107#if __ELF__
108
109#if __PIC__ || __PIE__
110# define WANT_PIC 1
111#endif
112
113#define TYPE_FUNC(name) .type name, STT_FUNC
114
115#define SIZE_OBJ(name) .size name, . - name
116
117#endif
118
119///--------------------------------------------------------------------------
0f23f75f
MW		 120/// Windows-specific hacking.
121
122#if ABI_WIN
1a0c09c4
MW		 123
124#if CPUFAM_X86
0f23f75f
MW		 125# define F(name) _##name
126#endif
127
128#endif
129
130///--------------------------------------------------------------------------
131/// x86- and amd64-specific hacking.
132///
133/// It's (slightly) easier to deal with both of these in one go.
134
135#if CPUFAM_X86 || CPUFAM_AMD64
1a0c09c4 136
2cb17e02
MW		 137// Word size.
138#if CPUFAM_X86
139# define WORDSZ 4
140#endif
141#if CPUFAM_AMD64
142# define WORDSZ 8
143#endif
144
1a0c09c4
MW		 145// Set the function hooks.
146#define FUNC_PREHOOK(_) .balign 16
147
f71dd54d
MW		 148// On Windows, arrange to install stack-unwinding data.
149#if CPUFAM_AMD64 && ABI_WIN
150# define FUNC_POSTHOOK(name) .seh_proc name
151# define ENDFUNC_HOOK(_) .seh_endproc
152// Procedures are expected to invoke `.seh_setframe' if necessary, and
153// `.seh_pushreg' and friends, and `.seh_endprologue'.
154#endif
155
0923a413
MW		 156#if __ELF__
157# define FUNC_POSTHOOK(_) .cfi_startproc
158# define ENDFUNC_HOOK(_) .cfi_endproc
159#endif
160
1a0c09c4
MW		 161// Don't use the wretched AT&T syntax. It's festooned with pointless
162// punctuation, and all of the data movement is backwards. Ugh!
163 .intel_syntax noprefix
164
165// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 166.macro callext addr
1a0c09c4
MW		 167#if WANT_PIC
168 call \addr@PLT
169#else
170 call \addr
171#endif
8a1aa284 172.endm
1a0c09c4
MW		 173
174// Do I need to arrange a spare GOT register?
175#if WANT_PIC && CPUFAM_X86
176# define NEED_GOT 1
177#endif
178#define GOTREG ebx // Not needed in AMD64 so don't care.
179
180// Maybe load GOT address into GOT.
8a1aa284 181.macro ldgot got=GOTREG
0f23f75f 182#if WANT_PIC && CPUFAM_X86
8ae4c946 183 AUXFN(_ldgot.\got)
1a0c09c4
MW		 184 mov \got, [esp]
185 ret
8ae4c946
MW		 186 ENDAUXFN
187 call _ldgot.\got
188 add \got, offset _GLOBAL_OFFSET_TABLE_
1a0c09c4 189#endif
8a1aa284 190.endm
1a0c09c4
MW		 191
192// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 193.macro leaext reg, addr, got=GOTREG
1a0c09c4 194#if WANT_PIC
0f23f75f 195# if CPUFAM_X86
1a0c09c4 196 mov \reg, [\got + \addr@GOT]
0f23f75f
MW		 197# endif
198# if CPUFAM_AMD64
199 mov \reg, \addr@GOTPCREL[rip]
200# endif
1a0c09c4 201#else
0f23f75f 202# if CPUFAM_X86
1a0c09c4 203 mov \reg, offset \addr
0f23f75f
MW		 204# endif
205# if CPUFAM_AMD64
206 lea \reg, \addr[rip]
207# endif
1a0c09c4 208#endif
8a1aa284 209.endm
1a0c09c4
MW		 210
211// Address expression (possibly using a base register, and a displacement)
212// referring to ADDR, which is within our module, maybe using GOT.
213#define INTADDR(...) INTADDR__0(__VA_ARGS__, GOTREG, dummy)
214#define INTADDR__0(addr, got, ...) INTADDR__1(addr, got)
0f23f75f
MW		 215#if CPUFAM_AMD64
216# define INTADDR__1(addr, got) addr + rip
217#elif WANT_PIC
1a0c09c4
MW		 218# define INTADDR__1(addr, got) got + addr@GOTOFF
219#else
220# define INTADDR__1(addr, got) addr
221#endif
222
a117c06f
MW		 223// Permutations for SIMD instructions. SHUF(A, B, C, D) is an immediate,
224// suitable for use in `pshufd' or `shufpd', which copies element A
225// (0 <= A < 4) of the source to element 0 of the destination, element B to
226// element 1, element C to element 2, and element D to element 3.
227#define SHUF(a, b, c, d) ((a) + 4*(b) + 16*(c) + 64*(d))
a13b5730 228
43ea7558
MW		 229// Map register names to their individual pieces.
230
231// Apply decoration decor to (internal) register name reg of type ty.
232//
233// See `R_...' for internal register names. Decorations are as follows.
234//
235// b low byte (e.g., `al', `r8b')
236// h high byte (e.g., `ah')
237// w word (e.g., `ax', `r8w')
238// d doubleword (e.g., `eax', `r8d')
239// q quadword (e.g., `rax', `r8')
240// r whole register (doubleword on x86, quadword on amd64)
241//
242// And types are as follows.
243//
244// abcd the four traditional registers `a', `b', `c', `d'
245// xp the four pointer registers `si', `di', `bp', `sp'
246// ip the instruction pointer `ip'
247// rn the AMD64 numbered registers `r8'--`r15'
248#define _DECOR(ty, decor, reg) _DECOR_##ty##_##decor(reg)
249
250// Internal macros: _DECOR_ty_decor(reg) applies decoration decor to
251// (internal) register name reg of type ty.
252
253#define _DECOR_abcd_b(reg) reg##l
254#define _DECOR_abcd_h(reg) reg##h
255#define _DECOR_abcd_w(reg) reg##x
256#define _DECOR_abcd_d(reg) e##reg##x
257#if CPUFAM_AMD64
258# define _DECOR_abcd_q(reg) r##reg##x
259#endif
260
43ea7558
MW		 261#define _DECOR_xp_w(reg) reg
262#define _DECOR_xp_d(reg) e##reg
263#if CPUFAM_AMD64
a105615f 264# define _DECOR_xp_b(reg) reg##l
43ea7558
MW		 265# define _DECOR_xp_q(reg) r##reg
266#endif
267
268#define _DECOR_ip_w(reg) reg
269#define _DECOR_ip_d(reg) e##reg
270#if CPUFAM_AMD64
271# define _DECOR_ip_q(reg) r##reg
272#endif
273
274#if CPUFAM_AMD64
275# define _DECOR_rn_b(reg) reg##b
276# define _DECOR_rn_w(reg) reg##w
277# define _DECOR_rn_d(reg) reg##d
278# define _DECOR_rn_q(reg) reg
279# define _DECOR_rn_r(reg) reg
280#endif
281
005cd277
MW		 282#define _DECOR_mem_b(addr) byte ptr addr
283#define _DECOR_mem_w(addr) word ptr addr
284#define _DECOR_mem_d(addr) dword ptr addr
285#if CPUFAM_AMD64
286# define _DECOR_mem_q(addr) qword ptr addr
287#endif
288
7e251005
MW		 289#define _DECOR_imm_b(imm) byte imm
290#define _DECOR_imm_w(imm) word imm
291#define _DECOR_imm_d(imm) dword imm
292#if CPUFAM_AMD64
293# define _DECOR_imm_q(imm) qword imm
294#endif
295
43ea7558
MW		 296#if CPUFAM_X86
297# define _DECOR_abcd_r(reg) e##reg##x
298# define _DECOR_xp_r(reg) e##reg
299# define _DECOR_ip_r(reg) e##reg
3c0490d1 300# define _DECOR_mem_r(addr) dword ptr addr
7e251005 301# define _DECOR_imm_r(imm) dword imm
43ea7558
MW		 302#endif
303#if CPUFAM_AMD64
304# define _DECOR_abcd_r(reg) r##reg##x
305# define _DECOR_xp_r(reg) r##reg
306# define _DECOR_ip_r(reg) r##reg
3c0490d1 307# define _DECOR_mem_r(addr) qword ptr addr
7e251005 308# define _DECOR_imm_r(imm) qword imm
43ea7558
MW		 309#endif
310
43ea7558
MW		 311// R_r(decor) applies decoration decor to register r, which is an internal
312// register name. The internal register names are: `ip', `a', `b', `c', `d',
313// `si', `di', `bp', `sp', `r8'--`r15'.
4ff9d579 314#define R_nil(decor) nil
43ea7558
MW		 315#define R_ip(decor) _DECOR(ip, decor, ip)
316#define R_a(decor) _DECOR(abcd, decor, a)
317#define R_b(decor) _DECOR(abcd, decor, b)
318#define R_c(decor) _DECOR(abcd, decor, c)
319#define R_d(decor) _DECOR(abcd, decor, d)
320#define R_si(decor) _DECOR(xp, decor, si)
321#define R_di(decor) _DECOR(xp, decor, di)
322#define R_bp(decor) _DECOR(xp, decor, bp)
323#define R_sp(decor) _DECOR(xp, decor, sp)
324#if CPUFAM_AMD64
325# define R_r8(decor) _DECOR(rn, decor, r8)
326# define R_r9(decor) _DECOR(rn, decor, r9)
327# define R_r10(decor) _DECOR(rn, decor, r10)
328# define R_r11(decor) _DECOR(rn, decor, r11)
329# define R_r12(decor) _DECOR(rn, decor, r12)
330# define R_r13(decor) _DECOR(rn, decor, r13)
331# define R_r14(decor) _DECOR(rn, decor, r14)
332# define R_r15(decor) _DECOR(rn, decor, r15)
333#endif
334
335// Refer to an in-memory datum of the type implied by decor residing at
336// address addr (which should supply its own square-brackets).
337#define MEM(decor, addr) _DECOR(mem, decor, addr)
338
7e251005
MW		 339// Refer to an immediate datum of the type implied by decor.
340#define IMM(decor, imm) _DECOR(mem, decor, imm)
341
43ea7558
MW		 342// Applies decoration decor to assembler-level register name reg.
343#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
344
345// Internal macros: _REGFORM_r(decor) applies decoration decor to an
346// assembler-level register name, in place of any decoration that register
347// name has already.
348
4ff9d579
MW		 349#define _REGFORM_nil(decor) R_nil(decor)
350
43ea7558
MW		 351#define _REGFORM_ip(decor) R_ip(decor)
352#define _REGFORM_eip(decor) R_ip(decor)
353
354#define _REGFORM_a(decor) R_a(decor)
355#define _REGFORM_al(decor) R_a(decor)
356#define _REGFORM_ah(decor) R_a(decor)
357#define _REGFORM_ax(decor) R_a(decor)
358#define _REGFORM_eax(decor) R_a(decor)
359
360#define _REGFORM_b(decor) R_b(decor)
361#define _REGFORM_bl(decor) R_b(decor)
362#define _REGFORM_bh(decor) R_b(decor)
363#define _REGFORM_bx(decor) R_b(decor)
364#define _REGFORM_ebx(decor) R_b(decor)
365
366#define _REGFORM_c(decor) R_c(decor)
367#define _REGFORM_cl(decor) R_c(decor)
368#define _REGFORM_ch(decor) R_c(decor)
369#define _REGFORM_cx(decor) R_c(decor)
370#define _REGFORM_ecx(decor) R_c(decor)
371
372#define _REGFORM_d(decor) R_d(decor)
373#define _REGFORM_dl(decor) R_d(decor)
374#define _REGFORM_dh(decor) R_d(decor)
375#define _REGFORM_dx(decor) R_d(decor)
376#define _REGFORM_edx(decor) R_d(decor)
377
378#define _REGFORM_si(decor) R_si(decor)
379#define _REGFORM_sil(decor) R_si(decor)
380#define _REGFORM_esi(decor) R_si(decor)
381
382#define _REGFORM_di(decor) R_di(decor)
383#define _REGFORM_dil(decor) R_di(decor)
384#define _REGFORM_edi(decor) R_di(decor)
385
386#define _REGFORM_bp(decor) R_bp(decor)
387#define _REGFORM_bpl(decor) R_bp(decor)
388#define _REGFORM_ebp(decor) R_bp(decor)
389
390#define _REGFORM_sp(decor) R_sp(decor)
391#define _REGFORM_spl(decor) R_sp(decor)
392#define _REGFORM_esp(decor) R_sp(decor)
393
394#if CPUFAM_AMD64
395
396# define _REGFORM_rip(decor) R_ip(decor)
397# define _REGFORM_rsp(decor) R_sp(decor)
398# define _REGFORM_rbp(decor) R_bp(decor)
399# define _REGFORM_rdi(decor) R_di(decor)
400# define _REGFORM_rsi(decor) R_si(decor)
401# define _REGFORM_rdx(decor) R_d(decor)
402# define _REGFORM_rcx(decor) R_c(decor)
403# define _REGFORM_rbx(decor) R_b(decor)
404# define _REGFORM_rax(decor) R_a(decor)
405
406# define _REGFORM_r8(decor) R_r8(decor)
407# define _REGFORM_r8b(decor) R_r8(decor)
408# define _REGFORM_r8w(decor) R_r8(decor)
409# define _REGFORM_r8d(decor) R_r8(decor)
410
411# define _REGFORM_r9(decor) R_r9(decor)
412# define _REGFORM_r9b(decor) R_r9(decor)
413# define _REGFORM_r9w(decor) R_r9(decor)
414# define _REGFORM_r9d(decor) R_r9(decor)
415
416# define _REGFORM_r10(decor) R_r10(decor)
417# define _REGFORM_r10b(decor) R_r10(decor)
418# define _REGFORM_r10w(decor) R_r10(decor)
419# define _REGFORM_r10d(decor) R_r10(decor)
420
421# define _REGFORM_r11(decor) R_r11(decor)
422# define _REGFORM_r11b(decor) R_r11(decor)
423# define _REGFORM_r11w(decor) R_r11(decor)
424# define _REGFORM_r11d(decor) R_r11(decor)
425
426# define _REGFORM_r12(decor) R_r12(decor)
427# define _REGFORM_r12b(decor) R_r12(decor)
428# define _REGFORM_r12w(decor) R_r12(decor)
429# define _REGFORM_r12d(decor) R_r12(decor)
430
431# define _REGFORM_r13(decor) R_r13(decor)
432# define _REGFORM_r13b(decor) R_r13(decor)
433# define _REGFORM_r13w(decor) R_r13(decor)
434# define _REGFORM_r13d(decor) R_r13(decor)
435
436# define _REGFORM_r14(decor) R_r14(decor)
437# define _REGFORM_r14b(decor) R_r14(decor)
438# define _REGFORM_r14w(decor) R_r14(decor)
439# define _REGFORM_r14d(decor) R_r14(decor)
440
441# define _REGFORM_r15(decor) R_r15(decor)
442# define _REGFORM_r15b(decor) R_r15(decor)
443# define _REGFORM_r15w(decor) R_r15(decor)
444# define _REGFORM_r15d(decor) R_r15(decor)
445
446#endif
447
448// Macros for converting register names.
449#define BYTE(reg) _REGFORM(reg, b)
450#define HIBYTE(reg) _REGFORM(reg, h)
451#define WORD(reg) _REGFORM(reg, w)
452#define DWORD(reg) _REGFORM(reg, d)
453#if CPUFAM_AMD64
454# define QWORD(reg) _REGFORM(reg, q)
455#endif
456#define WHOLE(reg) _REGFORM(reg, r)
457
a90d420c
MW		 458// Macros for some common registers.
459#define AX R_a(r)
460#define BX R_b(r)
461#define CX R_c(r)
462#define DX R_d(r)
463#define SI R_si(r)
464#define DI R_di(r)
465#define BP R_bp(r)
466#define SP R_sp(r)
467
0923a413 468// Stack management and unwinding.
a90d420c 469.macro setfp fp=BP, offset=0
0923a413 470 .if \offset == 0
a90d420c 471 mov \fp, SP
0923a413
MW		 472#if __ELF__
473 .cfi_def_cfa_register \fp
474#endif
475#if ABI_WIN && CPUFAM_AMD64
476 .seh_setframe \fp, 0
477#endif
478 .else
a90d420c 479 lea \fp, [SP + \offset]
0923a413
MW		 480#if __ELF__
481 .cfi_def_cfa_register \fp
482 .cfi_adjust_cfa_offset -\offset
483#endif
484#if ABI_WIN && CPUFAM_AMD64
485 .seh_setframe \fp, \offset
486#endif
487 .endif
488 .L$_frameptr_p = -1
489 .macro dropfp; _dropfp \fp, \offset; .endm
490.endm
491
cdc153a5 492.macro _dropfp fp, offset=0
0923a413 493 .if \offset == 0
a90d420c 494 mov SP, \fp
0923a413 495#if __ELF__
a90d420c 496 .cfi_def_cfa_register SP
0923a413
MW		 497#endif
498 .else
a90d420c 499 lea SP, [\fp - \offset]
0923a413 500#if __ELF__
a90d420c 501 .cfi_def_cfa_register SP
0923a413
MW		 502 .cfi_adjust_cfa_offset +\offset
503#endif
504 .endif
505 .L$_frameptr_p = 0
506 .purgem dropfp
507.endm
508
509.macro stalloc n
a90d420c 510 sub SP, \n
0923a413
MW		 511#if __ELF__
512 .cfi_adjust_cfa_offset +\n
513#endif
514#if ABI_WIN && CPUFAM_AMD64
515 .seh_stackalloc \n
516#endif
517.endm
518
519.macro stfree n
a90d420c 520 add SP, \n
0923a413
MW		 521#if __ELF__
522 .cfi_adjust_cfa_offset -\n
523#endif
524.endm
525
526.macro pushreg r
527 push \r
528#if __ELF__
529 .cfi_adjust_cfa_offset +WORDSZ
530 .cfi_rel_offset \r, 0
531#endif
532#if ABI_WIN && CPUFAM_AMD64
533 .seh_pushreg \r
534#endif
535.endm
536
537.macro popreg r
538 pop \r
539#if __ELF__
540 .cfi_adjust_cfa_offset -WORDSZ
541 .cfi_restore \r
542#endif
543.endm
544
545.macro savexmm r, offset
a90d420c 546 movdqa [SP + \offset], \r
0923a413
MW		 547#if ABI_WIN && CPUFAM_AMD64
548 .seh_savexmm \r, \offset
549#endif
550.endm
551
552.macro rstrxmm r, offset
a90d420c 553 movdqa \r, [SP + \offset]
0923a413
MW		 554.endm
555
556.macro endprologue
557#if ABI_WIN && CPUFAM_AMD64
558 .seh_endprologue
559#endif
560 .L$_prologue_p = -1
561.endm
562
1a0c09c4
MW		 563#endif
564
565///--------------------------------------------------------------------------
61bd904b
MW		 566/// ARM-specific hacking.
567
59d86860 568#if CPUFAM_ARMEL
61bd904b 569
9f6eb05d
MW		 570// ARM/Thumb mode things. Use ARM by default.
571#define ARM .arm; .L$_pcoff = 8
572#define THUMB .thumb; .L$_pcoff = 4
573 ARM
574
61bd904b 575// Set the function hooks.
0923a413
MW		 576#define FUNC_PREHOOK(_) .balign 4; .fnstart
577#define ENDFUNC_HOOK(_) .fnend; .ltorg
61bd904b
MW		 578
579// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 580.macro callext addr, cond=
61bd904b
MW		 581#if WANT_PIC
582 bl\cond \addr(PLT)
583#else
584 bl\cond \addr
585#endif
8a1aa284 586.endm
61bd904b
MW		 587
588// Do I need to arrange a spare GOT register?
589#if WANT_PIC
590# define NEED_GOT 1
591#endif
592#define GOTREG r9
593
594// Maybe load GOT address into GOT.
8a1aa284 595.macro ldgot cond=, got=GOTREG
61bd904b 596#if WANT_PIC
adca2a18
MW		 597 ldr\cond \got, .L$_ldgot$\@
598.L$_ldgot_pc$\@:
2d03a881 599 add\cond \got, pc, \got
8a1aa284 600 _LIT
adca2a18
MW		 601 .balign 4
602.L$_ldgot$\@:
9f6eb05d 603 .word _GLOBAL_OFFSET_TABLE_ - .L$_ldgot_pc$\@ - .L$_pcoff
8a1aa284 604 _ENDLIT
61bd904b 605#endif
8a1aa284 606.endm
61bd904b
MW		 607
608// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 609.macro leaext reg, addr, cond=, got=GOTREG
61bd904b 610#if WANT_PIC
adca2a18 611 ldr\cond \reg, .L$_leaext$\@
2d03a881 612 ldr\cond \reg, [\got, \reg]
8a1aa284 613 _LIT
adca2a18
MW		 614 .balign 4
615.L$_leaext$\@:
616 .word \addr(GOT)
8a1aa284 617 _ENDLIT
61bd904b 618#else
2d03a881 619 ldr\cond \reg, =\addr
61bd904b 620#endif
8a1aa284 621.endm
61bd904b 622
0c53ac58 623// Load address of external symbol ADDR into REG directly.
8a1aa284 624.macro leaextq reg, addr, cond=
0c53ac58
MW		 625#if WANT_PIC
626 ldr\cond \reg, .L$_leaextq$\@
627.L$_leaextq_pc$\@:
b6db2017 628 .if .L$_pcoff == 8
0c53ac58 629 ldr\cond \reg, [pc, \reg]
b6db2017 630 .else
9f6eb05d
MW		 631 add\cond \reg, pc
632 ldr\cond \reg, [\reg]
b6db2017 633 .endif
8a1aa284 634 _LIT
0c53ac58
MW		 635 .balign 4
636.L$_leaextq$\@:
9f6eb05d 637 .word \addr(GOT_PREL) + (. - .L$_leaextq_pc$\@ - .L$_pcoff)
8a1aa284 638 _ENDLIT
0c53ac58
MW		 639#else
640 ldr\cond \reg, =\addr
641#endif
8a1aa284 642.endm
0c53ac58 643
1a031196
MW		 644.macro vzero vz=q15
645 // Set VZ (default q15) to zero.
646 vmov.u32 \vz, #0
647.endm
648
649.macro vshl128 vd, vn, nbit, vz=q15
650 // Set VD to VN shifted left by NBIT. Assume VZ (default q15) is
651 // all-bits-zero. NBIT must be a multiple of 8.
652 .if \nbit&3 != 0
653 .error "shift quantity must be whole number of bytes"
654 .endif
655 vext.8 \vd, \vz, \vn, #16 - (\nbit >> 3)
656.endm
657
658.macro vshr128 vd, vn, nbit, vz=q15
659 // Set VD to VN shifted right by NBIT. Assume VZ (default q15) is
660 // all-bits-zero. NBIT must be a multiple of 8.
661 .if \nbit&3 != 0
662 .error "shift quantity must be whole number of bytes"
663 .endif
664 vext.8 \vd, \vn, \vz, #\nbit >> 3
665.endm
666
43ea7558
MW		 667// Apply decoration decor to register name reg.
668#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
669
670// Internal macros: `_REGFORM_r(decor)' applies decoration decor to register
671// name r.
672
4ff9d579
MW		 673#define _REGFORM_nil(decor) nil
674
43ea7558
MW		 675#define _REGFORM_s0(decor) _DECOR(s, decor, 0)
676#define _REGFORM_s1(decor) _DECOR(s, decor, 1)
677#define _REGFORM_s2(decor) _DECOR(s, decor, 2)
678#define _REGFORM_s3(decor) _DECOR(s, decor, 3)
679#define _REGFORM_s4(decor) _DECOR(s, decor, 4)
680#define _REGFORM_s5(decor) _DECOR(s, decor, 5)
681#define _REGFORM_s6(decor) _DECOR(s, decor, 6)
682#define _REGFORM_s7(decor) _DECOR(s, decor, 7)
683#define _REGFORM_s8(decor) _DECOR(s, decor, 8)
684#define _REGFORM_s9(decor) _DECOR(s, decor, 9)
685#define _REGFORM_s10(decor) _DECOR(s, decor, 10)
686#define _REGFORM_s11(decor) _DECOR(s, decor, 11)
687#define _REGFORM_s12(decor) _DECOR(s, decor, 12)
688#define _REGFORM_s13(decor) _DECOR(s, decor, 13)
689#define _REGFORM_s14(decor) _DECOR(s, decor, 14)
690#define _REGFORM_s15(decor) _DECOR(s, decor, 15)
691#define _REGFORM_s16(decor) _DECOR(s, decor, 16)
692#define _REGFORM_s17(decor) _DECOR(s, decor, 17)
693#define _REGFORM_s18(decor) _DECOR(s, decor, 18)
694#define _REGFORM_s19(decor) _DECOR(s, decor, 19)
695#define _REGFORM_s20(decor) _DECOR(s, decor, 20)
696#define _REGFORM_s21(decor) _DECOR(s, decor, 21)
697#define _REGFORM_s22(decor) _DECOR(s, decor, 22)
698#define _REGFORM_s23(decor) _DECOR(s, decor, 23)
699#define _REGFORM_s24(decor) _DECOR(s, decor, 24)
700#define _REGFORM_s25(decor) _DECOR(s, decor, 25)
701#define _REGFORM_s26(decor) _DECOR(s, decor, 26)
702#define _REGFORM_s27(decor) _DECOR(s, decor, 27)
703#define _REGFORM_s28(decor) _DECOR(s, decor, 28)
704#define _REGFORM_s29(decor) _DECOR(s, decor, 29)
705#define _REGFORM_s30(decor) _DECOR(s, decor, 30)
706#define _REGFORM_s31(decor) _DECOR(s, decor, 31)
707
708#define _REGFORM_d0(decor) _DECOR(d, decor, 0)
709#define _REGFORM_d1(decor) _DECOR(d, decor, 1)
710#define _REGFORM_d2(decor) _DECOR(d, decor, 2)
711#define _REGFORM_d3(decor) _DECOR(d, decor, 3)
712#define _REGFORM_d4(decor) _DECOR(d, decor, 4)
713#define _REGFORM_d5(decor) _DECOR(d, decor, 5)
714#define _REGFORM_d6(decor) _DECOR(d, decor, 6)
715#define _REGFORM_d7(decor) _DECOR(d, decor, 7)
716#define _REGFORM_d8(decor) _DECOR(d, decor, 8)
717#define _REGFORM_d9(decor) _DECOR(d, decor, 9)
718#define _REGFORM_d10(decor) _DECOR(d, decor, 10)
719#define _REGFORM_d11(decor) _DECOR(d, decor, 11)
720#define _REGFORM_d12(decor) _DECOR(d, decor, 12)
721#define _REGFORM_d13(decor) _DECOR(d, decor, 13)
722#define _REGFORM_d14(decor) _DECOR(d, decor, 14)
723#define _REGFORM_d15(decor) _DECOR(d, decor, 15)
724#define _REGFORM_d16(decor) _DECOR(d, decor, 16)
725#define _REGFORM_d17(decor) _DECOR(d, decor, 17)
726#define _REGFORM_d18(decor) _DECOR(d, decor, 18)
727#define _REGFORM_d19(decor) _DECOR(d, decor, 19)
728#define _REGFORM_d20(decor) _DECOR(d, decor, 20)
729#define _REGFORM_d21(decor) _DECOR(d, decor, 21)
730#define _REGFORM_d22(decor) _DECOR(d, decor, 22)
731#define _REGFORM_d23(decor) _DECOR(d, decor, 23)
732#define _REGFORM_d24(decor) _DECOR(d, decor, 24)
733#define _REGFORM_d25(decor) _DECOR(d, decor, 25)
734#define _REGFORM_d26(decor) _DECOR(d, decor, 26)
735#define _REGFORM_d27(decor) _DECOR(d, decor, 27)
736#define _REGFORM_d28(decor) _DECOR(d, decor, 28)
737#define _REGFORM_d29(decor) _DECOR(d, decor, 29)
738#define _REGFORM_d30(decor) _DECOR(d, decor, 30)
739#define _REGFORM_d31(decor) _DECOR(d, decor, 31)
740
741#define _REGFORM_q0(decor) _DECOR(q, decor, 0)
742#define _REGFORM_q1(decor) _DECOR(q, decor, 1)
743#define _REGFORM_q2(decor) _DECOR(q, decor, 2)
744#define _REGFORM_q3(decor) _DECOR(q, decor, 3)
745#define _REGFORM_q4(decor) _DECOR(q, decor, 4)
746#define _REGFORM_q5(decor) _DECOR(q, decor, 5)
747#define _REGFORM_q6(decor) _DECOR(q, decor, 6)
748#define _REGFORM_q7(decor) _DECOR(q, decor, 7)
749#define _REGFORM_q8(decor) _DECOR(q, decor, 8)
750#define _REGFORM_q9(decor) _DECOR(q, decor, 9)
751#define _REGFORM_q10(decor) _DECOR(q, decor, 10)
752#define _REGFORM_q11(decor) _DECOR(q, decor, 11)
753#define _REGFORM_q12(decor) _DECOR(q, decor, 12)
754#define _REGFORM_q13(decor) _DECOR(q, decor, 13)
755#define _REGFORM_q14(decor) _DECOR(q, decor, 14)
756#define _REGFORM_q15(decor) _DECOR(q, decor, 15)
757
758// `_LOPART(n)' and `_HIPART(n)' return the numbers of the register halves of
759// register n, i.e., 2*n and 2*n + 1 respectively.
760#define _LOPART(n) _GLUE(_LOPART_, n)
761#define _HIPART(n) _GLUE(_HIPART_, n)
762
763// Internal macros: `_LOPART_n' and `_HIPART_n' return the numbers of the
764// register halves of register n, i.e., 2*n and 2*n + 1 respectively.
765
766#define _LOPART_0 0
767#define _HIPART_0 1
768#define _LOPART_1 2
769#define _HIPART_1 3
770#define _LOPART_2 4
771#define _HIPART_2 5
772#define _LOPART_3 6
773#define _HIPART_3 7
774#define _LOPART_4 8
775#define _HIPART_4 9
776#define _LOPART_5 10
777#define _HIPART_5 11
778#define _LOPART_6 12
779#define _HIPART_6 13
780#define _LOPART_7 14
781#define _HIPART_7 15
782#define _LOPART_8 16
783#define _HIPART_8 17
784#define _LOPART_9 18
785#define _HIPART_9 19
786#define _LOPART_10 20
787#define _HIPART_10 21
788#define _LOPART_11 22
789#define _HIPART_11 23
790#define _LOPART_12 24
791#define _HIPART_12 25
792#define _LOPART_13 26
793#define _HIPART_13 27
794#define _LOPART_14 28
795#define _HIPART_14 29
796#define _LOPART_15 30
797#define _HIPART_15 31
798
799// Return the register number of the pair containing register n, i.e.,
800// floor(n/2).
801#define _PAIR(n) _GLUE(_PAIR_, n)
802
803// Internal macros: `_PAIR_n' returns the register number of the pair
804// containing register n, i.e., floor(n/2).
805#define _PAIR_0 0
806#define _PAIR_1 0
807#define _PAIR_2 1
808#define _PAIR_3 1
809#define _PAIR_4 2
810#define _PAIR_5 2
811#define _PAIR_6 3
812#define _PAIR_7 3
813#define _PAIR_8 4
814#define _PAIR_9 4
815#define _PAIR_10 5
816#define _PAIR_11 5
817#define _PAIR_12 6
818#define _PAIR_13 6
819#define _PAIR_14 7
820#define _PAIR_15 7
821#define _PAIR_16 8
822#define _PAIR_17 8
823#define _PAIR_18 9
824#define _PAIR_19 9
825#define _PAIR_20 10
826#define _PAIR_21 10
827#define _PAIR_22 11
828#define _PAIR_23 11
829#define _PAIR_24 12
830#define _PAIR_25 12
831#define _PAIR_26 13
832#define _PAIR_27 13
833#define _PAIR_28 14
834#define _PAIR_29 14
835#define _PAIR_30 15
836#define _PAIR_31 15
837
838// Apply decoration decor to register number n of type ty. Decorations are
839// as follows.
840//
841// decor types meaning
842// Q s, d the NEON qN register containing this one
843// D s the NEON dN register containing this one
844// D0 q the low 64-bit half of this one
845// D1 q the high 64-bit half of this one
846// S0 d, q the first 32-bit piece of this one
847// S1 d, q the second 32-bit piece of this one
848// S2 q the third 32-bit piece of this one
849// S3 q the fourth 32-bit piece of this one
850// Bn q the nth byte of this register, as a scalar
851// Hn q the nth halfword of this register, as a scalar
852// Wn q the nth word of this register, as a scalar
853#define _DECOR(ty, decor, n) _DECOR_##ty##_##decor(n)
854
855// Internal macros: `_DECOR_ty_decor(n)' applies decoration decor to register
856// number n of type ty.
857
858#define _DECOR_s_Q(n) GLUE(q, _PAIR(_PAIR(n)))
859#define _DECOR_s_D(n) GLUE(d, _PAIR(n))
860
861#define _DECOR_d_Q(n) GLUE(q, _PAIR(n))
862#define _DECOR_d_S0(n) GLUE(s, _LOPART(n))
863#define _DECOR_d_S1(n) GLUE(s, _LOPART(n))
864
865#define _DECOR_q_D0(n) GLUE(d, _LOPART(n))
866#define _DECOR_q_D1(n) GLUE(d, _HIPART(n))
867#define _DECOR_q_S0(n) GLUE(s, _LOPART(_LOPART(n)))
868#define _DECOR_q_S1(n) GLUE(s, _HIPART(_LOPART(n)))
869#define _DECOR_q_S2(n) GLUE(s, _LOPART(_HIPART(n)))
870#define _DECOR_q_S3(n) GLUE(s, _HIPART(_HIPART(n)))
871#define _DECOR_q_W0(n) GLUE(d, _LOPART(n))[0]
872#define _DECOR_q_W1(n) GLUE(d, _LOPART(n))[1]
873#define _DECOR_q_W2(n) GLUE(d, _HIPART(n))[0]
874#define _DECOR_q_W3(n) GLUE(d, _HIPART(n))[1]
875#define _DECOR_q_H0(n) GLUE(d, _LOPART(n))[0]
876#define _DECOR_q_H1(n) GLUE(d, _LOPART(n))[1]
877#define _DECOR_q_H2(n) GLUE(d, _LOPART(n))[2]
878#define _DECOR_q_H3(n) GLUE(d, _LOPART(n))[3]
879#define _DECOR_q_H4(n) GLUE(d, _HIPART(n))[0]
880#define _DECOR_q_H5(n) GLUE(d, _HIPART(n))[1]
881#define _DECOR_q_H6(n) GLUE(d, _HIPART(n))[2]
882#define _DECOR_q_H7(n) GLUE(d, _HIPART(n))[3]
883#define _DECOR_q_B0(n) GLUE(d, _LOPART(n))[0]
884#define _DECOR_q_B1(n) GLUE(d, _LOPART(n))[1]
885#define _DECOR_q_B2(n) GLUE(d, _LOPART(n))[2]
886#define _DECOR_q_B3(n) GLUE(d, _LOPART(n))[3]
887#define _DECOR_q_B4(n) GLUE(d, _LOPART(n))[4]
888#define _DECOR_q_B5(n) GLUE(d, _LOPART(n))[5]
889#define _DECOR_q_B6(n) GLUE(d, _LOPART(n))[6]
890#define _DECOR_q_B7(n) GLUE(d, _LOPART(n))[7]
891#define _DECOR_q_B8(n) GLUE(d, _HIPART(n))[0]
892#define _DECOR_q_B9(n) GLUE(d, _HIPART(n))[1]
893#define _DECOR_q_B10(n) GLUE(d, _HIPART(n))[2]
894#define _DECOR_q_B11(n) GLUE(d, _HIPART(n))[3]
895#define _DECOR_q_B12(n) GLUE(d, _HIPART(n))[4]
896#define _DECOR_q_B13(n) GLUE(d, _HIPART(n))[5]
897#define _DECOR_q_B14(n) GLUE(d, _HIPART(n))[6]
898#define _DECOR_q_B15(n) GLUE(d, _HIPART(n))[7]
899
900// Macros for navigating the NEON register hierarchy.
901#define S0(reg) _REGFORM(reg, S0)
902#define S1(reg) _REGFORM(reg, S1)
903#define S2(reg) _REGFORM(reg, S2)
904#define S3(reg) _REGFORM(reg, S3)
905#define D(reg) _REGFORM(reg, D)
906#define D0(reg) _REGFORM(reg, D0)
907#define D1(reg) _REGFORM(reg, D1)
908#define Q(reg) _REGFORM(reg, Q)
909
910// Macros for indexing quadword registers.
911#define QB(reg, i) _REGFORM(reg, B##i)
912#define QH(reg, i) _REGFORM(reg, H##i)
913#define QW(reg, i) _REGFORM(reg, W##i)
914
915// Macros for converting vldm/vstm ranges.
916#define QQ(qlo, qhi) D0(qlo)-D1(qhi)
917
0923a413 918// Stack management and unwinding.
42c44b27 919.macro setfp fp=r11, offset=0
0923a413
MW		 920 .if \offset == 0
921 mov \fp, sp
922 .setfp \fp, sp
923 .else
924 add \fp, sp, #\offset
925 .setfp \fp, sp, #\offset
926 .endif
927 .macro dropfp; _dropfp \fp, \offset; .endm
928 .L$_frameptr_p = -1
929.endm
930
cdc153a5 931.macro _dropfp fp, offset=0
0923a413
MW		 932 .if \offset == 0
933 mov sp, \fp
934 .else
935 sub sp, \fp, #\offset
936 .endif
937 .purgem dropfp
938 .L$_frameptr_p = 0
939.endm
940
941.macro stalloc n
942 sub sp, sp, #\n
943 .pad #\n
944.endm
945
946.macro stfree n
947 add sp, sp, #\n
948 .pad #-\n
949.endm
950
951.macro pushreg rr:vararg
1f1fd884 952 push {\rr}
0923a413
MW		 953 .save {\rr}
954.endm
955
956.macro popreg rr:vararg
1f1fd884 957 pop {\rr}
0923a413
MW		 958.endm
959
960.macro pushvfp rr:vararg
961 vstmdb sp!, {\rr}
962 .vsave {\rr}
963.endm
964
965.macro popvfp rr:vararg
966 vldmia sp!, {\rr}
967.endm
968
969.macro endprologue
970.endm
971
972// No need for prologue markers on ARM.
973#define FUNC_POSTHOOK(_) .L$_prologue_p = -1
974
61bd904b
MW		 975#endif
976
977///--------------------------------------------------------------------------
e492db88
MW		 978/// AArch64-specific hacking.
979
980#if CPUFAM_ARM64
981
982// Set the function hooks.
983#define FUNC_PREHOOK(_) .balign 4
984#define FUNC_POSTHOOK(_) .cfi_startproc; .L$_prologue_p = -1
985#define ENDFUNC_HOOK(_) .cfi_endproc
986
987// Call external subroutine at ADDR, possibly via PLT.
988.macro callext addr
989 bl \addr
990.endm
991
992// Load address of external symbol ADDR into REG.
993.macro leaext reg, addr
994#if WANT_PIC
995 adrp \reg, :got:\addr
996 ldr \reg, [\reg, #:got_lo12:\addr]
997#else
998 adrp \reg, \addr
999 add \reg, \reg, #:lo12:\addr
1000#endif
1001.endm
1002
1a031196
MW		 1003.macro vzero vz=v31
1004 // Set VZ (default v31) to zero.
1005 dup \vz\().4s, wzr
1006.endm
1007
1008.macro vshl128 vd, vn, nbit, vz=v31
1009 // Set VD to VN shifted left by NBIT. Assume VZ (default v31) is
1010 // all-bits-zero. NBIT must be a multiple of 8.
1011 .if \nbit&3 != 0
1012 .error "shift quantity must be whole number of bytes"
1013 .endif
1014 ext \vd\().16b, \vz\().16b, \vn\().16b, #16 - (\nbit >> 3)
1015.endm
1016
1017.macro vshr128 vd, vn, nbit, vz=v31
1018 // Set VD to VN shifted right by NBIT. Assume VZ (default v31) is
1019 // all-bits-zero. NBIT must be a multiple of 8.
1020 .if \nbit&3 != 0
1021 .error "shift quantity must be whole number of bytes"
1022 .endif
1023 ext \vd\().16b, \vn\().16b, \vz\().16b, #\nbit >> 3
1024.endm
1025
e492db88 1026// Stack management and unwinding.
42c44b27 1027.macro setfp fp=x29, offset=0
e492db88
MW		 1028 // If you're just going through the motions with a fixed-size stack frame,
1029 // then you want to say `add x29, sp, #OFFSET' directly, which will avoid
1030 // pointlessly restoring sp later.
1031 .if \offset == 0
1032 mov \fp, sp
1033 .cfi_def_cfa_register \fp
1034 .else
1035 add \fp, sp, #\offset
1036 .cfi_def_cfa_register \fp
1037 .cfi_adjust_cfa_offset -\offset
1038 .endif
1039 .macro dropfp; _dropfp \fp, \offset; .endm
1040 .L$_frameptr_p = -1
1041.endm
1042
cdc153a5 1043.macro _dropfp fp, offset=0
e492db88
MW		 1044 .if \offset == 0
1045 mov sp, \fp
1046 .cfi_def_cfa_register sp
1047 .else
1048 sub sp, \fp, #\offset
1049 .cfi_def_cfa_register sp
1050 .cfi_adjust_cfa_offset +\offset
1051 .endif
1052 .purgem dropfp
1053 .L$_frameptr_p = 0
1054.endm
1055
1056.macro stalloc n
1057 sub sp, sp, #\n
1058 .cfi_adjust_cfa_offset +\n
1059.endm
1060
1061.macro stfree n
1062 add sp, sp, #\n
1063 .cfi_adjust_cfa_offset -\n
1064.endm
1065
4bf3072e
MW		 1066.macro pushreg x, y=nil
1067 .ifeqs "\y", "nil"
e492db88
MW		 1068 str \x, [sp, #-16]!
1069 .cfi_adjust_cfa_offset +16
1070 .cfi_rel_offset \x, 0
1071 .else
1072 stp \x, \y, [sp, #-16]!
1073 .cfi_adjust_cfa_offset +16
1074 .cfi_rel_offset \x, 0
1075 .cfi_rel_offset \y, 8
1076 .endif
1077.endm
1078
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MW		 1079.macro popreg x, y=nil
1080 .ifeqs "\y", "nil"
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MW		 1081 ldr \x, [sp], #16
1082 .cfi_restore \x
1083 .cfi_adjust_cfa_offset -16
1084 .else
1085 ldp \x, \y, [sp], #16
1086 .cfi_restore \x
1087 .cfi_restore \y
1088 .cfi_adjust_cfa_offset -16
1089 .endif
1090.endm
1091
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MW		 1092.macro savereg x, y, z=nil
1093 .ifeqs "\z", "nil"
1094 str \x, [sp, \y]
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MW		 1095 .cfi_rel_offset \x, \y
1096 .else
1097 stp \x, \y, [sp, #\z]
1098 .cfi_rel_offset \x, \z
1099 .cfi_rel_offset \y, \z + 8
1100 .endif
1101.endm
1102
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MW		 1103.macro rstrreg x, y, z=nil
1104 .ifeqs "\z", "nil"
1105 ldr \x, [sp, \y]
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MW		 1106 .cfi_restore \x
1107 .else
1108 ldp \x, \y, [sp, #\z]
1109 .cfi_restore \x
1110 .cfi_restore \y
1111 .endif
1112.endm
1113
1114.macro endprologue
1115.endm
1116
1117#endif
1118
1119///--------------------------------------------------------------------------
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MW		 1120/// Final stuff.
1121
1122// Default values for the various hooks.
1123#ifndef FUNC_PREHOOK
1e5664a6 1124# define FUNC_PREHOOK(_)
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MW		 1125#endif
1126#ifndef FUNC_POSTHOOK
1e5664a6 1127# define FUNC_POSTHOOK(_)
1a0c09c4
MW		 1128#endif
1129#ifndef ENDFUNC_HOOK
1e5664a6 1130# define ENDFUNC_HOOK(_)
1a0c09c4
MW		 1131#endif
1132
1133#ifndef F
772740dd
MW		 1134# ifdef SYM_USCORE
1135# define F(name) _##name
1136# else
1137# define F(name) name
1138# endif
1a0c09c4
MW		 1139#endif
1140
1141#ifndef TYPE_FUNC
1142# define TYPE_FUNC(name)
1143#endif
1144
1145#ifndef SIZE_OBJ
1146# define SIZE_OBJ(name)
1147#endif
1148
91c8af7d 1149#if __ELF__ && !defined(WANT_EXECUTABLE_STACK)
1aa5bfa8
MW		 1150 .pushsection .note.GNU-stack, "", _SECTTY(progbits)
1151 .popsection
1152#endif
1153
1a0c09c4 1154///----- That's all, folks --------------------------------------------------
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MW		 1155
1156#endif
Catacomb cryptographic library