base/asm-common.h: Add some macros for shifting entire NEON vectors.
[catacomb] / base / asm-common.h
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1/// -*- mode: asm; asm-comment-char: ?/ -*-
2///
08b868da 3/// Common definitions for asesembler source files
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4///
5/// (c) 2015 Straylight/Edgeware
6///
7
8///----- Licensing notice ---------------------------------------------------
9///
10/// This file is part of Catacomb.
11///
12/// Catacomb is free software; you can redistribute it and/or modify
13/// it under the terms of the GNU Library General Public License as
14/// published by the Free Software Foundation; either version 2 of the
15/// License, or (at your option) any later version.
16///
17/// Catacomb is distributed in the hope that it will be useful,
18/// but WITHOUT ANY WARRANTY; without even the implied warranty of
19/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20/// GNU Library General Public License for more details.
21///
22/// You should have received a copy of the GNU Library General Public
23/// License along with Catacomb; if not, write to the Free
24/// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25/// MA 02111-1307, USA.
26
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27#ifndef CATACOMB_ASM_COMMON_H
28#define CATACOMB_ASM_COMMON_H
29
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30///--------------------------------------------------------------------------
31/// General definitions.
32
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33// Preprocessor hacks.
34#define STRINGY(x) _STRINGY(x, y)
35#define _STRINGY(x) #x
36#define GLUE(x, y) _GLUE(x, y)
37#define _GLUE(x, y) x##y
38#define _EMPTY
39
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40// Some useful variables.
41 .L$_subsec = 0
42
43// Literal pools done the hard way.
44#define _LIT .text .L$_subsec + 1
45#define _ENDLIT .text .L$_subsec
6c54cbd3 46#define _LTORG .L$_subsec = .L$_subsec + 2; .text .L$_subsec
f8e509a9 47
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48// ELF section types.
49#if __ELF__
50# if CPUFAM_ARMEL
51# define _SECTTY(ty) %ty
52# else
53# define _SECTTY(ty) @ty
54# endif
55#endif
56
57// Section selection.
58#define TEXT .text .L$_subsec
59#if ABI_WIN
60# define RODATA .section .rdata, "dr"
61#elif __ELF__
62# define RODATA .section .rodata, "a", _SECTTY(progbits)
63#else
64# define RODATA TEXT
65#endif
66#define DATA .data
67
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68// Announcing an internal function.
69#define INTFUNC(name) \
1a0c09c4 70 TYPE_FUNC(name); \
8a1aa284 71 .macro ENDFUNC; _ENDFUNC(name); .endm; \
0923a413 72 .L$_prologue_p = 0; .L$_frameptr_p = 0; \
1a0c09c4 73 FUNC_PREHOOK(name); \
1a517bb3 74name: \
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75 FUNC_POSTHOOK(name)
76
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77// Announcing an external function.
78#define FUNC(name) \
79 .globl F(name); \
80INTFUNC(F(name))
81
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82// Marking the end of a function.
83#define _ENDFUNC(name) \
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84 .if ~ .L$_prologue_p; .error "Missing `endprologue'"; .endif; \
85 .if .L$_frameptr_p; .purgem dropfp; .endif; \
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86 .purgem ENDFUNC; \
87 SIZE_OBJ(name); \
f8e509a9 88 ENDFUNC_HOOK(name); \
6c54cbd3 89 _LTORG
1a0c09c4 90
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91// Make a helper function, if necessary.
92#define AUXFN(name) \
93 .ifndef .L$_auxfn_def.name; \
94 .text 7128; \
95 .macro _ENDAUXFN; _ENDAUXFN_TAIL(name); .endm; \
96 FUNC_PREHOOK(name); \
97name:
98#define _ENDAUXFN_TAIL(name) \
99 .purgem _ENDAUXFN; \
100 .text .L$_subsec; \
101 .L$_auxfn_def.name = 1
102#define ENDAUXFN _ENDAUXFN; .endif
103
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104///--------------------------------------------------------------------------
105/// ELF-specific hacking.
106
107#if __ELF__
108
109#if __PIC__ || __PIE__
110# define WANT_PIC 1
111#endif
112
113#define TYPE_FUNC(name) .type name, STT_FUNC
114
115#define SIZE_OBJ(name) .size name, . - name
116
117#endif
118
119///--------------------------------------------------------------------------
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120/// Windows-specific hacking.
121
122#if ABI_WIN
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123
124#if CPUFAM_X86
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125# define F(name) _##name
126#endif
127
128#endif
129
130///--------------------------------------------------------------------------
131/// x86- and amd64-specific hacking.
132///
133/// It's (slightly) easier to deal with both of these in one go.
134
135#if CPUFAM_X86 || CPUFAM_AMD64
1a0c09c4 136
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137// Word size.
138#if CPUFAM_X86
139# define WORDSZ 4
140#endif
141#if CPUFAM_AMD64
142# define WORDSZ 8
143#endif
144
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145// Set the function hooks.
146#define FUNC_PREHOOK(_) .balign 16
147
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148// On Windows, arrange to install stack-unwinding data.
149#if CPUFAM_AMD64 && ABI_WIN
150# define FUNC_POSTHOOK(name) .seh_proc name
151# define ENDFUNC_HOOK(_) .seh_endproc
152// Procedures are expected to invoke `.seh_setframe' if necessary, and
153// `.seh_pushreg' and friends, and `.seh_endprologue'.
154#endif
155
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156#if __ELF__
157# define FUNC_POSTHOOK(_) .cfi_startproc
158# define ENDFUNC_HOOK(_) .cfi_endproc
159#endif
160
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161// Don't use the wretched AT&T syntax. It's festooned with pointless
162// punctuation, and all of the data movement is backwards. Ugh!
163 .intel_syntax noprefix
164
165// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 166.macro callext addr
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167#if WANT_PIC
168 call \addr@PLT
169#else
170 call \addr
171#endif
8a1aa284 172.endm
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173
174// Do I need to arrange a spare GOT register?
175#if WANT_PIC && CPUFAM_X86
176# define NEED_GOT 1
177#endif
178#define GOTREG ebx // Not needed in AMD64 so don't care.
179
180// Maybe load GOT address into GOT.
8a1aa284 181.macro ldgot got=GOTREG
0f23f75f 182#if WANT_PIC && CPUFAM_X86
8ae4c946 183 AUXFN(_ldgot.\got)
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184 mov \got, [esp]
185 ret
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186 ENDAUXFN
187 call _ldgot.\got
188 add \got, offset _GLOBAL_OFFSET_TABLE_
1a0c09c4 189#endif
8a1aa284 190.endm
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191
192// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 193.macro leaext reg, addr, got=GOTREG
1a0c09c4 194#if WANT_PIC
0f23f75f 195# if CPUFAM_X86
1a0c09c4 196 mov \reg, [\got + \addr@GOT]
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197# endif
198# if CPUFAM_AMD64
199 mov \reg, \addr@GOTPCREL[rip]
200# endif
1a0c09c4 201#else
0f23f75f 202# if CPUFAM_X86
1a0c09c4 203 mov \reg, offset \addr
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204# endif
205# if CPUFAM_AMD64
206 lea \reg, \addr[rip]
207# endif
1a0c09c4 208#endif
8a1aa284 209.endm
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210
211// Address expression (possibly using a base register, and a displacement)
212// referring to ADDR, which is within our module, maybe using GOT.
213#define INTADDR(...) INTADDR__0(__VA_ARGS__, GOTREG, dummy)
214#define INTADDR__0(addr, got, ...) INTADDR__1(addr, got)
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215#if CPUFAM_AMD64
216# define INTADDR__1(addr, got) addr + rip
217#elif WANT_PIC
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218# define INTADDR__1(addr, got) got + addr@GOTOFF
219#else
220# define INTADDR__1(addr, got) addr
221#endif
222
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223// Permutations for SIMD instructions. SHUF(A, B, C, D) is an immediate,
224// suitable for use in `pshufd' or `shufpd', which copies element A
225// (0 <= A < 4) of the source to element 0 of the destination, element B to
226// element 1, element C to element 2, and element D to element 3.
227#define SHUF(a, b, c, d) ((a) + 4*(b) + 16*(c) + 64*(d))
a13b5730 228
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229// Map register names to their individual pieces.
230
231// Apply decoration decor to (internal) register name reg of type ty.
232//
233// See `R_...' for internal register names. Decorations are as follows.
234//
235// b low byte (e.g., `al', `r8b')
236// h high byte (e.g., `ah')
237// w word (e.g., `ax', `r8w')
238// d doubleword (e.g., `eax', `r8d')
239// q quadword (e.g., `rax', `r8')
240// r whole register (doubleword on x86, quadword on amd64)
241//
242// And types are as follows.
243//
244// abcd the four traditional registers `a', `b', `c', `d'
245// xp the four pointer registers `si', `di', `bp', `sp'
246// ip the instruction pointer `ip'
247// rn the AMD64 numbered registers `r8'--`r15'
248#define _DECOR(ty, decor, reg) _DECOR_##ty##_##decor(reg)
249
250// Internal macros: _DECOR_ty_decor(reg) applies decoration decor to
251// (internal) register name reg of type ty.
252
253#define _DECOR_abcd_b(reg) reg##l
254#define _DECOR_abcd_h(reg) reg##h
255#define _DECOR_abcd_w(reg) reg##x
256#define _DECOR_abcd_d(reg) e##reg##x
257#if CPUFAM_AMD64
258# define _DECOR_abcd_q(reg) r##reg##x
259#endif
260
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261#define _DECOR_xp_w(reg) reg
262#define _DECOR_xp_d(reg) e##reg
263#if CPUFAM_AMD64
a105615f 264# define _DECOR_xp_b(reg) reg##l
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265# define _DECOR_xp_q(reg) r##reg
266#endif
267
268#define _DECOR_ip_w(reg) reg
269#define _DECOR_ip_d(reg) e##reg
270#if CPUFAM_AMD64
271# define _DECOR_ip_q(reg) r##reg
272#endif
273
274#if CPUFAM_AMD64
275# define _DECOR_rn_b(reg) reg##b
276# define _DECOR_rn_w(reg) reg##w
277# define _DECOR_rn_d(reg) reg##d
278# define _DECOR_rn_q(reg) reg
279# define _DECOR_rn_r(reg) reg
280#endif
281
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282#define _DECOR_mem_b(addr) byte ptr addr
283#define _DECOR_mem_w(addr) word ptr addr
284#define _DECOR_mem_d(addr) dword ptr addr
285#if CPUFAM_AMD64
286# define _DECOR_mem_q(addr) qword ptr addr
287#endif
288
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289#define _DECOR_imm_b(imm) byte imm
290#define _DECOR_imm_w(imm) word imm
291#define _DECOR_imm_d(imm) dword imm
292#if CPUFAM_AMD64
293# define _DECOR_imm_q(imm) qword imm
294#endif
295
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296#if CPUFAM_X86
297# define _DECOR_abcd_r(reg) e##reg##x
298# define _DECOR_xp_r(reg) e##reg
299# define _DECOR_ip_r(reg) e##reg
3c0490d1 300# define _DECOR_mem_r(addr) dword ptr addr
7e251005 301# define _DECOR_imm_r(imm) dword imm
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302#endif
303#if CPUFAM_AMD64
304# define _DECOR_abcd_r(reg) r##reg##x
305# define _DECOR_xp_r(reg) r##reg
306# define _DECOR_ip_r(reg) r##reg
3c0490d1 307# define _DECOR_mem_r(addr) qword ptr addr
7e251005 308# define _DECOR_imm_r(imm) qword imm
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309#endif
310
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311// R_r(decor) applies decoration decor to register r, which is an internal
312// register name. The internal register names are: `ip', `a', `b', `c', `d',
313// `si', `di', `bp', `sp', `r8'--`r15'.
314#define R_ip(decor) _DECOR(ip, decor, ip)
315#define R_a(decor) _DECOR(abcd, decor, a)
316#define R_b(decor) _DECOR(abcd, decor, b)
317#define R_c(decor) _DECOR(abcd, decor, c)
318#define R_d(decor) _DECOR(abcd, decor, d)
319#define R_si(decor) _DECOR(xp, decor, si)
320#define R_di(decor) _DECOR(xp, decor, di)
321#define R_bp(decor) _DECOR(xp, decor, bp)
322#define R_sp(decor) _DECOR(xp, decor, sp)
323#if CPUFAM_AMD64
324# define R_r8(decor) _DECOR(rn, decor, r8)
325# define R_r9(decor) _DECOR(rn, decor, r9)
326# define R_r10(decor) _DECOR(rn, decor, r10)
327# define R_r11(decor) _DECOR(rn, decor, r11)
328# define R_r12(decor) _DECOR(rn, decor, r12)
329# define R_r13(decor) _DECOR(rn, decor, r13)
330# define R_r14(decor) _DECOR(rn, decor, r14)
331# define R_r15(decor) _DECOR(rn, decor, r15)
332#endif
333
334// Refer to an in-memory datum of the type implied by decor residing at
335// address addr (which should supply its own square-brackets).
336#define MEM(decor, addr) _DECOR(mem, decor, addr)
337
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338// Refer to an immediate datum of the type implied by decor.
339#define IMM(decor, imm) _DECOR(mem, decor, imm)
340
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341// Applies decoration decor to assembler-level register name reg.
342#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
343
344// Internal macros: _REGFORM_r(decor) applies decoration decor to an
345// assembler-level register name, in place of any decoration that register
346// name has already.
347
348#define _REGFORM_ip(decor) R_ip(decor)
349#define _REGFORM_eip(decor) R_ip(decor)
350
351#define _REGFORM_a(decor) R_a(decor)
352#define _REGFORM_al(decor) R_a(decor)
353#define _REGFORM_ah(decor) R_a(decor)
354#define _REGFORM_ax(decor) R_a(decor)
355#define _REGFORM_eax(decor) R_a(decor)
356
357#define _REGFORM_b(decor) R_b(decor)
358#define _REGFORM_bl(decor) R_b(decor)
359#define _REGFORM_bh(decor) R_b(decor)
360#define _REGFORM_bx(decor) R_b(decor)
361#define _REGFORM_ebx(decor) R_b(decor)
362
363#define _REGFORM_c(decor) R_c(decor)
364#define _REGFORM_cl(decor) R_c(decor)
365#define _REGFORM_ch(decor) R_c(decor)
366#define _REGFORM_cx(decor) R_c(decor)
367#define _REGFORM_ecx(decor) R_c(decor)
368
369#define _REGFORM_d(decor) R_d(decor)
370#define _REGFORM_dl(decor) R_d(decor)
371#define _REGFORM_dh(decor) R_d(decor)
372#define _REGFORM_dx(decor) R_d(decor)
373#define _REGFORM_edx(decor) R_d(decor)
374
375#define _REGFORM_si(decor) R_si(decor)
376#define _REGFORM_sil(decor) R_si(decor)
377#define _REGFORM_esi(decor) R_si(decor)
378
379#define _REGFORM_di(decor) R_di(decor)
380#define _REGFORM_dil(decor) R_di(decor)
381#define _REGFORM_edi(decor) R_di(decor)
382
383#define _REGFORM_bp(decor) R_bp(decor)
384#define _REGFORM_bpl(decor) R_bp(decor)
385#define _REGFORM_ebp(decor) R_bp(decor)
386
387#define _REGFORM_sp(decor) R_sp(decor)
388#define _REGFORM_spl(decor) R_sp(decor)
389#define _REGFORM_esp(decor) R_sp(decor)
390
391#if CPUFAM_AMD64
392
393# define _REGFORM_rip(decor) R_ip(decor)
394# define _REGFORM_rsp(decor) R_sp(decor)
395# define _REGFORM_rbp(decor) R_bp(decor)
396# define _REGFORM_rdi(decor) R_di(decor)
397# define _REGFORM_rsi(decor) R_si(decor)
398# define _REGFORM_rdx(decor) R_d(decor)
399# define _REGFORM_rcx(decor) R_c(decor)
400# define _REGFORM_rbx(decor) R_b(decor)
401# define _REGFORM_rax(decor) R_a(decor)
402
403# define _REGFORM_r8(decor) R_r8(decor)
404# define _REGFORM_r8b(decor) R_r8(decor)
405# define _REGFORM_r8w(decor) R_r8(decor)
406# define _REGFORM_r8d(decor) R_r8(decor)
407
408# define _REGFORM_r9(decor) R_r9(decor)
409# define _REGFORM_r9b(decor) R_r9(decor)
410# define _REGFORM_r9w(decor) R_r9(decor)
411# define _REGFORM_r9d(decor) R_r9(decor)
412
413# define _REGFORM_r10(decor) R_r10(decor)
414# define _REGFORM_r10b(decor) R_r10(decor)
415# define _REGFORM_r10w(decor) R_r10(decor)
416# define _REGFORM_r10d(decor) R_r10(decor)
417
418# define _REGFORM_r11(decor) R_r11(decor)
419# define _REGFORM_r11b(decor) R_r11(decor)
420# define _REGFORM_r11w(decor) R_r11(decor)
421# define _REGFORM_r11d(decor) R_r11(decor)
422
423# define _REGFORM_r12(decor) R_r12(decor)
424# define _REGFORM_r12b(decor) R_r12(decor)
425# define _REGFORM_r12w(decor) R_r12(decor)
426# define _REGFORM_r12d(decor) R_r12(decor)
427
428# define _REGFORM_r13(decor) R_r13(decor)
429# define _REGFORM_r13b(decor) R_r13(decor)
430# define _REGFORM_r13w(decor) R_r13(decor)
431# define _REGFORM_r13d(decor) R_r13(decor)
432
433# define _REGFORM_r14(decor) R_r14(decor)
434# define _REGFORM_r14b(decor) R_r14(decor)
435# define _REGFORM_r14w(decor) R_r14(decor)
436# define _REGFORM_r14d(decor) R_r14(decor)
437
438# define _REGFORM_r15(decor) R_r15(decor)
439# define _REGFORM_r15b(decor) R_r15(decor)
440# define _REGFORM_r15w(decor) R_r15(decor)
441# define _REGFORM_r15d(decor) R_r15(decor)
442
443#endif
444
445// Macros for converting register names.
446#define BYTE(reg) _REGFORM(reg, b)
447#define HIBYTE(reg) _REGFORM(reg, h)
448#define WORD(reg) _REGFORM(reg, w)
449#define DWORD(reg) _REGFORM(reg, d)
450#if CPUFAM_AMD64
451# define QWORD(reg) _REGFORM(reg, q)
452#endif
453#define WHOLE(reg) _REGFORM(reg, r)
454
0923a413 455// Stack management and unwinding.
42c44b27 456.macro setfp fp=R_bp(r), offset=0
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457 .if \offset == 0
458 mov \fp, R_sp(r)
459#if __ELF__
460 .cfi_def_cfa_register \fp
461#endif
462#if ABI_WIN && CPUFAM_AMD64
463 .seh_setframe \fp, 0
464#endif
465 .else
466 lea \fp, [R_sp(r) + \offset]
467#if __ELF__
468 .cfi_def_cfa_register \fp
469 .cfi_adjust_cfa_offset -\offset
470#endif
471#if ABI_WIN && CPUFAM_AMD64
472 .seh_setframe \fp, \offset
473#endif
474 .endif
475 .L$_frameptr_p = -1
476 .macro dropfp; _dropfp \fp, \offset; .endm
477.endm
478
cdc153a5 479.macro _dropfp fp, offset=0
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480 .if \offset == 0
481 mov R_sp(r), \fp
482#if __ELF__
483 .cfi_def_cfa_register R_sp(r)
484#endif
485 .else
486 lea R_sp(r), [\fp - \offset]
487#if __ELF__
488 .cfi_def_cfa_register R_sp(r)
489 .cfi_adjust_cfa_offset +\offset
490#endif
491 .endif
492 .L$_frameptr_p = 0
493 .purgem dropfp
494.endm
495
496.macro stalloc n
497 sub R_sp(r), \n
498#if __ELF__
499 .cfi_adjust_cfa_offset +\n
500#endif
501#if ABI_WIN && CPUFAM_AMD64
502 .seh_stackalloc \n
503#endif
504.endm
505
506.macro stfree n
507 add R_sp(r), \n
508#if __ELF__
509 .cfi_adjust_cfa_offset -\n
510#endif
511.endm
512
513.macro pushreg r
514 push \r
515#if __ELF__
516 .cfi_adjust_cfa_offset +WORDSZ
517 .cfi_rel_offset \r, 0
518#endif
519#if ABI_WIN && CPUFAM_AMD64
520 .seh_pushreg \r
521#endif
522.endm
523
524.macro popreg r
525 pop \r
526#if __ELF__
527 .cfi_adjust_cfa_offset -WORDSZ
528 .cfi_restore \r
529#endif
530.endm
531
532.macro savexmm r, offset
533 movdqa [R_sp(r) + \offset], \r
534#if ABI_WIN && CPUFAM_AMD64
535 .seh_savexmm \r, \offset
536#endif
537.endm
538
539.macro rstrxmm r, offset
540 movdqa \r, [R_sp(r) + \offset]
541.endm
542
543.macro endprologue
544#if ABI_WIN && CPUFAM_AMD64
545 .seh_endprologue
546#endif
547 .L$_prologue_p = -1
548.endm
549
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550#endif
551
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552#if CPUFAM_X86
553
554.macro _reg.0
555 // Stash GP registers and establish temporary stack frame.
556 pushfd
557 push eax
558 push ecx
559 push edx
560 push ebp
561 mov ebp, esp
562 and esp, ~15
563 sub esp, 512
564 fxsave [esp]
565.endm
566
567.macro _reg.1
568.endm
569
570.macro _reg.2
571.endm
572
573.macro _reg.3 fmt
574 // Print FMT and the other established arguments.
575 lea eax, .L$_reg$msg.\@
576 push eax
577 call printf
578 jmp .L$_reg$cont.\@
579.L$_reg$msg.\@:
580 .ascii ";; \fmt\n\0"
581.L$_reg$cont.\@:
582 mov eax, ebp
583 and eax, ~15
584 sub eax, 512
585 fxrstor [eax]
586 mov esp, ebp
587 pop ebp
588 pop edx
589 pop ecx
590 pop eax
591 popfd
592.endm
593
594.macro msg msg
595 _reg.0
596 _reg.1
597 _reg.2
598 _reg.3 "\msg"
599.endm
600
601.macro reg r, msg
602 _reg.0
603 .ifeqs "\r", "esp"
604 lea eax, [ebp + 20]
605 push eax
606 .else
607 .ifeqs "\r", "ebp"
608 push [ebp]
609 .else
610 push \r
611 .endif
612 .endif
613 _reg.1
614 _reg.2
615 _reg.3 "\msg: \r = %08x"
616.endm
617
618.macro xmmreg r, msg
619 _reg.0
620 _reg.1
621 _reg.2
622 movdqu xmm0, \r
623 pshufd xmm0, xmm0, 0x1b
624 sub esp, 16
625 movdqa [esp], xmm0
626 _reg.3 "\msg: \r = %08x %08x %08x %08x"
627.endm
628
629.macro mmreg r, msg
630 _reg.0
631 _reg.1
632 _reg.2
633 pshufw \r, \r, 0x4e
634 sub esp, 8
635 movq [esp], \r
636 _reg.3 "\msg: \r = %08x %08x"
637.endm
638
639.macro freg i, msg
640 _reg.0
641 _reg.1
642 _reg.2
643 finit
644 fldt [esp + 32 + 16*\i]
645 sub esp, 12
646 fstpt [esp]
647 _reg.3 "\msg: st(\i) = %.20Lg"
648.endm
649
650.macro fxreg i, msg
651 _reg.0
652 _reg.1
653 _reg.2
654 finit
655 fldt [esp + 32 + 16*\i]
656 sub esp, 12
657 fstpt [esp]
658 _reg.3 "\msg: st(\i) = %La"
659.endm
660
661#endif
662
1a0c09c4 663///--------------------------------------------------------------------------
61bd904b
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664/// ARM-specific hacking.
665
59d86860 666#if CPUFAM_ARMEL
61bd904b 667
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668// ARM/Thumb mode things. Use ARM by default.
669#define ARM .arm; .L$_pcoff = 8
670#define THUMB .thumb; .L$_pcoff = 4
671 ARM
672
61bd904b 673// Set the function hooks.
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674#define FUNC_PREHOOK(_) .balign 4; .fnstart
675#define ENDFUNC_HOOK(_) .fnend; .ltorg
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676
677// Call external subroutine at ADDR, possibly via PLT.
8a1aa284 678.macro callext addr, cond=
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679#if WANT_PIC
680 bl\cond \addr(PLT)
681#else
682 bl\cond \addr
683#endif
8a1aa284 684.endm
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685
686// Do I need to arrange a spare GOT register?
687#if WANT_PIC
688# define NEED_GOT 1
689#endif
690#define GOTREG r9
691
692// Maybe load GOT address into GOT.
8a1aa284 693.macro ldgot cond=, got=GOTREG
61bd904b 694#if WANT_PIC
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695 ldr\cond \got, .L$_ldgot$\@
696.L$_ldgot_pc$\@:
2d03a881 697 add\cond \got, pc, \got
8a1aa284 698 _LIT
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699 .balign 4
700.L$_ldgot$\@:
9f6eb05d 701 .word _GLOBAL_OFFSET_TABLE_ - .L$_ldgot_pc$\@ - .L$_pcoff
8a1aa284 702 _ENDLIT
61bd904b 703#endif
8a1aa284 704.endm
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705
706// Load address of external symbol ADDR into REG, maybe using GOT.
8a1aa284 707.macro leaext reg, addr, cond=, got=GOTREG
61bd904b 708#if WANT_PIC
adca2a18 709 ldr\cond \reg, .L$_leaext$\@
2d03a881 710 ldr\cond \reg, [\got, \reg]
8a1aa284 711 _LIT
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712 .balign 4
713.L$_leaext$\@:
714 .word \addr(GOT)
8a1aa284 715 _ENDLIT
61bd904b 716#else
2d03a881 717 ldr\cond \reg, =\addr
61bd904b 718#endif
8a1aa284 719.endm
61bd904b 720
0c53ac58 721// Load address of external symbol ADDR into REG directly.
8a1aa284 722.macro leaextq reg, addr, cond=
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723#if WANT_PIC
724 ldr\cond \reg, .L$_leaextq$\@
725.L$_leaextq_pc$\@:
b6db2017 726 .if .L$_pcoff == 8
0c53ac58 727 ldr\cond \reg, [pc, \reg]
b6db2017 728 .else
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729 add\cond \reg, pc
730 ldr\cond \reg, [\reg]
b6db2017 731 .endif
8a1aa284 732 _LIT
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733 .balign 4
734.L$_leaextq$\@:
9f6eb05d 735 .word \addr(GOT_PREL) + (. - .L$_leaextq_pc$\@ - .L$_pcoff)
8a1aa284 736 _ENDLIT
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737#else
738 ldr\cond \reg, =\addr
739#endif
8a1aa284 740.endm
0c53ac58 741
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742.macro vzero vz=q15
743 // Set VZ (default q15) to zero.
744 vmov.u32 \vz, #0
745.endm
746
747.macro vshl128 vd, vn, nbit, vz=q15
748 // Set VD to VN shifted left by NBIT. Assume VZ (default q15) is
749 // all-bits-zero. NBIT must be a multiple of 8.
750 .if \nbit&3 != 0
751 .error "shift quantity must be whole number of bytes"
752 .endif
753 vext.8 \vd, \vz, \vn, #16 - (\nbit >> 3)
754.endm
755
756.macro vshr128 vd, vn, nbit, vz=q15
757 // Set VD to VN shifted right by NBIT. Assume VZ (default q15) is
758 // all-bits-zero. NBIT must be a multiple of 8.
759 .if \nbit&3 != 0
760 .error "shift quantity must be whole number of bytes"
761 .endif
762 vext.8 \vd, \vn, \vz, #\nbit >> 3
763.endm
764
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765// Apply decoration decor to register name reg.
766#define _REGFORM(reg, decor) _GLUE(_REGFORM_, reg)(decor)
767
768// Internal macros: `_REGFORM_r(decor)' applies decoration decor to register
769// name r.
770
771#define _REGFORM_s0(decor) _DECOR(s, decor, 0)
772#define _REGFORM_s1(decor) _DECOR(s, decor, 1)
773#define _REGFORM_s2(decor) _DECOR(s, decor, 2)
774#define _REGFORM_s3(decor) _DECOR(s, decor, 3)
775#define _REGFORM_s4(decor) _DECOR(s, decor, 4)
776#define _REGFORM_s5(decor) _DECOR(s, decor, 5)
777#define _REGFORM_s6(decor) _DECOR(s, decor, 6)
778#define _REGFORM_s7(decor) _DECOR(s, decor, 7)
779#define _REGFORM_s8(decor) _DECOR(s, decor, 8)
780#define _REGFORM_s9(decor) _DECOR(s, decor, 9)
781#define _REGFORM_s10(decor) _DECOR(s, decor, 10)
782#define _REGFORM_s11(decor) _DECOR(s, decor, 11)
783#define _REGFORM_s12(decor) _DECOR(s, decor, 12)
784#define _REGFORM_s13(decor) _DECOR(s, decor, 13)
785#define _REGFORM_s14(decor) _DECOR(s, decor, 14)
786#define _REGFORM_s15(decor) _DECOR(s, decor, 15)
787#define _REGFORM_s16(decor) _DECOR(s, decor, 16)
788#define _REGFORM_s17(decor) _DECOR(s, decor, 17)
789#define _REGFORM_s18(decor) _DECOR(s, decor, 18)
790#define _REGFORM_s19(decor) _DECOR(s, decor, 19)
791#define _REGFORM_s20(decor) _DECOR(s, decor, 20)
792#define _REGFORM_s21(decor) _DECOR(s, decor, 21)
793#define _REGFORM_s22(decor) _DECOR(s, decor, 22)
794#define _REGFORM_s23(decor) _DECOR(s, decor, 23)
795#define _REGFORM_s24(decor) _DECOR(s, decor, 24)
796#define _REGFORM_s25(decor) _DECOR(s, decor, 25)
797#define _REGFORM_s26(decor) _DECOR(s, decor, 26)
798#define _REGFORM_s27(decor) _DECOR(s, decor, 27)
799#define _REGFORM_s28(decor) _DECOR(s, decor, 28)
800#define _REGFORM_s29(decor) _DECOR(s, decor, 29)
801#define _REGFORM_s30(decor) _DECOR(s, decor, 30)
802#define _REGFORM_s31(decor) _DECOR(s, decor, 31)
803
804#define _REGFORM_d0(decor) _DECOR(d, decor, 0)
805#define _REGFORM_d1(decor) _DECOR(d, decor, 1)
806#define _REGFORM_d2(decor) _DECOR(d, decor, 2)
807#define _REGFORM_d3(decor) _DECOR(d, decor, 3)
808#define _REGFORM_d4(decor) _DECOR(d, decor, 4)
809#define _REGFORM_d5(decor) _DECOR(d, decor, 5)
810#define _REGFORM_d6(decor) _DECOR(d, decor, 6)
811#define _REGFORM_d7(decor) _DECOR(d, decor, 7)
812#define _REGFORM_d8(decor) _DECOR(d, decor, 8)
813#define _REGFORM_d9(decor) _DECOR(d, decor, 9)
814#define _REGFORM_d10(decor) _DECOR(d, decor, 10)
815#define _REGFORM_d11(decor) _DECOR(d, decor, 11)
816#define _REGFORM_d12(decor) _DECOR(d, decor, 12)
817#define _REGFORM_d13(decor) _DECOR(d, decor, 13)
818#define _REGFORM_d14(decor) _DECOR(d, decor, 14)
819#define _REGFORM_d15(decor) _DECOR(d, decor, 15)
820#define _REGFORM_d16(decor) _DECOR(d, decor, 16)
821#define _REGFORM_d17(decor) _DECOR(d, decor, 17)
822#define _REGFORM_d18(decor) _DECOR(d, decor, 18)
823#define _REGFORM_d19(decor) _DECOR(d, decor, 19)
824#define _REGFORM_d20(decor) _DECOR(d, decor, 20)
825#define _REGFORM_d21(decor) _DECOR(d, decor, 21)
826#define _REGFORM_d22(decor) _DECOR(d, decor, 22)
827#define _REGFORM_d23(decor) _DECOR(d, decor, 23)
828#define _REGFORM_d24(decor) _DECOR(d, decor, 24)
829#define _REGFORM_d25(decor) _DECOR(d, decor, 25)
830#define _REGFORM_d26(decor) _DECOR(d, decor, 26)
831#define _REGFORM_d27(decor) _DECOR(d, decor, 27)
832#define _REGFORM_d28(decor) _DECOR(d, decor, 28)
833#define _REGFORM_d29(decor) _DECOR(d, decor, 29)
834#define _REGFORM_d30(decor) _DECOR(d, decor, 30)
835#define _REGFORM_d31(decor) _DECOR(d, decor, 31)
836
837#define _REGFORM_q0(decor) _DECOR(q, decor, 0)
838#define _REGFORM_q1(decor) _DECOR(q, decor, 1)
839#define _REGFORM_q2(decor) _DECOR(q, decor, 2)
840#define _REGFORM_q3(decor) _DECOR(q, decor, 3)
841#define _REGFORM_q4(decor) _DECOR(q, decor, 4)
842#define _REGFORM_q5(decor) _DECOR(q, decor, 5)
843#define _REGFORM_q6(decor) _DECOR(q, decor, 6)
844#define _REGFORM_q7(decor) _DECOR(q, decor, 7)
845#define _REGFORM_q8(decor) _DECOR(q, decor, 8)
846#define _REGFORM_q9(decor) _DECOR(q, decor, 9)
847#define _REGFORM_q10(decor) _DECOR(q, decor, 10)
848#define _REGFORM_q11(decor) _DECOR(q, decor, 11)
849#define _REGFORM_q12(decor) _DECOR(q, decor, 12)
850#define _REGFORM_q13(decor) _DECOR(q, decor, 13)
851#define _REGFORM_q14(decor) _DECOR(q, decor, 14)
852#define _REGFORM_q15(decor) _DECOR(q, decor, 15)
853
854// `_LOPART(n)' and `_HIPART(n)' return the numbers of the register halves of
855// register n, i.e., 2*n and 2*n + 1 respectively.
856#define _LOPART(n) _GLUE(_LOPART_, n)
857#define _HIPART(n) _GLUE(_HIPART_, n)
858
859// Internal macros: `_LOPART_n' and `_HIPART_n' return the numbers of the
860// register halves of register n, i.e., 2*n and 2*n + 1 respectively.
861
862#define _LOPART_0 0
863#define _HIPART_0 1
864#define _LOPART_1 2
865#define _HIPART_1 3
866#define _LOPART_2 4
867#define _HIPART_2 5
868#define _LOPART_3 6
869#define _HIPART_3 7
870#define _LOPART_4 8
871#define _HIPART_4 9
872#define _LOPART_5 10
873#define _HIPART_5 11
874#define _LOPART_6 12
875#define _HIPART_6 13
876#define _LOPART_7 14
877#define _HIPART_7 15
878#define _LOPART_8 16
879#define _HIPART_8 17
880#define _LOPART_9 18
881#define _HIPART_9 19
882#define _LOPART_10 20
883#define _HIPART_10 21
884#define _LOPART_11 22
885#define _HIPART_11 23
886#define _LOPART_12 24
887#define _HIPART_12 25
888#define _LOPART_13 26
889#define _HIPART_13 27
890#define _LOPART_14 28
891#define _HIPART_14 29
892#define _LOPART_15 30
893#define _HIPART_15 31
894
895// Return the register number of the pair containing register n, i.e.,
896// floor(n/2).
897#define _PAIR(n) _GLUE(_PAIR_, n)
898
899// Internal macros: `_PAIR_n' returns the register number of the pair
900// containing register n, i.e., floor(n/2).
901#define _PAIR_0 0
902#define _PAIR_1 0
903#define _PAIR_2 1
904#define _PAIR_3 1
905#define _PAIR_4 2
906#define _PAIR_5 2
907#define _PAIR_6 3
908#define _PAIR_7 3
909#define _PAIR_8 4
910#define _PAIR_9 4
911#define _PAIR_10 5
912#define _PAIR_11 5
913#define _PAIR_12 6
914#define _PAIR_13 6
915#define _PAIR_14 7
916#define _PAIR_15 7
917#define _PAIR_16 8
918#define _PAIR_17 8
919#define _PAIR_18 9
920#define _PAIR_19 9
921#define _PAIR_20 10
922#define _PAIR_21 10
923#define _PAIR_22 11
924#define _PAIR_23 11
925#define _PAIR_24 12
926#define _PAIR_25 12
927#define _PAIR_26 13
928#define _PAIR_27 13
929#define _PAIR_28 14
930#define _PAIR_29 14
931#define _PAIR_30 15
932#define _PAIR_31 15
933
934// Apply decoration decor to register number n of type ty. Decorations are
935// as follows.
936//
937// decor types meaning
938// Q s, d the NEON qN register containing this one
939// D s the NEON dN register containing this one
940// D0 q the low 64-bit half of this one
941// D1 q the high 64-bit half of this one
942// S0 d, q the first 32-bit piece of this one
943// S1 d, q the second 32-bit piece of this one
944// S2 q the third 32-bit piece of this one
945// S3 q the fourth 32-bit piece of this one
946// Bn q the nth byte of this register, as a scalar
947// Hn q the nth halfword of this register, as a scalar
948// Wn q the nth word of this register, as a scalar
949#define _DECOR(ty, decor, n) _DECOR_##ty##_##decor(n)
950
951// Internal macros: `_DECOR_ty_decor(n)' applies decoration decor to register
952// number n of type ty.
953
954#define _DECOR_s_Q(n) GLUE(q, _PAIR(_PAIR(n)))
955#define _DECOR_s_D(n) GLUE(d, _PAIR(n))
956
957#define _DECOR_d_Q(n) GLUE(q, _PAIR(n))
958#define _DECOR_d_S0(n) GLUE(s, _LOPART(n))
959#define _DECOR_d_S1(n) GLUE(s, _LOPART(n))
960
961#define _DECOR_q_D0(n) GLUE(d, _LOPART(n))
962#define _DECOR_q_D1(n) GLUE(d, _HIPART(n))
963#define _DECOR_q_S0(n) GLUE(s, _LOPART(_LOPART(n)))
964#define _DECOR_q_S1(n) GLUE(s, _HIPART(_LOPART(n)))
965#define _DECOR_q_S2(n) GLUE(s, _LOPART(_HIPART(n)))
966#define _DECOR_q_S3(n) GLUE(s, _HIPART(_HIPART(n)))
967#define _DECOR_q_W0(n) GLUE(d, _LOPART(n))[0]
968#define _DECOR_q_W1(n) GLUE(d, _LOPART(n))[1]
969#define _DECOR_q_W2(n) GLUE(d, _HIPART(n))[0]
970#define _DECOR_q_W3(n) GLUE(d, _HIPART(n))[1]
971#define _DECOR_q_H0(n) GLUE(d, _LOPART(n))[0]
972#define _DECOR_q_H1(n) GLUE(d, _LOPART(n))[1]
973#define _DECOR_q_H2(n) GLUE(d, _LOPART(n))[2]
974#define _DECOR_q_H3(n) GLUE(d, _LOPART(n))[3]
975#define _DECOR_q_H4(n) GLUE(d, _HIPART(n))[0]
976#define _DECOR_q_H5(n) GLUE(d, _HIPART(n))[1]
977#define _DECOR_q_H6(n) GLUE(d, _HIPART(n))[2]
978#define _DECOR_q_H7(n) GLUE(d, _HIPART(n))[3]
979#define _DECOR_q_B0(n) GLUE(d, _LOPART(n))[0]
980#define _DECOR_q_B1(n) GLUE(d, _LOPART(n))[1]
981#define _DECOR_q_B2(n) GLUE(d, _LOPART(n))[2]
982#define _DECOR_q_B3(n) GLUE(d, _LOPART(n))[3]
983#define _DECOR_q_B4(n) GLUE(d, _LOPART(n))[4]
984#define _DECOR_q_B5(n) GLUE(d, _LOPART(n))[5]
985#define _DECOR_q_B6(n) GLUE(d, _LOPART(n))[6]
986#define _DECOR_q_B7(n) GLUE(d, _LOPART(n))[7]
987#define _DECOR_q_B8(n) GLUE(d, _HIPART(n))[0]
988#define _DECOR_q_B9(n) GLUE(d, _HIPART(n))[1]
989#define _DECOR_q_B10(n) GLUE(d, _HIPART(n))[2]
990#define _DECOR_q_B11(n) GLUE(d, _HIPART(n))[3]
991#define _DECOR_q_B12(n) GLUE(d, _HIPART(n))[4]
992#define _DECOR_q_B13(n) GLUE(d, _HIPART(n))[5]
993#define _DECOR_q_B14(n) GLUE(d, _HIPART(n))[6]
994#define _DECOR_q_B15(n) GLUE(d, _HIPART(n))[7]
995
996// Macros for navigating the NEON register hierarchy.
997#define S0(reg) _REGFORM(reg, S0)
998#define S1(reg) _REGFORM(reg, S1)
999#define S2(reg) _REGFORM(reg, S2)
1000#define S3(reg) _REGFORM(reg, S3)
1001#define D(reg) _REGFORM(reg, D)
1002#define D0(reg) _REGFORM(reg, D0)
1003#define D1(reg) _REGFORM(reg, D1)
1004#define Q(reg) _REGFORM(reg, Q)
1005
1006// Macros for indexing quadword registers.
1007#define QB(reg, i) _REGFORM(reg, B##i)
1008#define QH(reg, i) _REGFORM(reg, H##i)
1009#define QW(reg, i) _REGFORM(reg, W##i)
1010
1011// Macros for converting vldm/vstm ranges.
1012#define QQ(qlo, qhi) D0(qlo)-D1(qhi)
1013
0923a413 1014// Stack management and unwinding.
42c44b27 1015.macro setfp fp=r11, offset=0
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1016 .if \offset == 0
1017 mov \fp, sp
1018 .setfp \fp, sp
1019 .else
1020 add \fp, sp, #\offset
1021 .setfp \fp, sp, #\offset
1022 .endif
1023 .macro dropfp; _dropfp \fp, \offset; .endm
1024 .L$_frameptr_p = -1
1025.endm
1026
cdc153a5 1027.macro _dropfp fp, offset=0
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1028 .if \offset == 0
1029 mov sp, \fp
1030 .else
1031 sub sp, \fp, #\offset
1032 .endif
1033 .purgem dropfp
1034 .L$_frameptr_p = 0
1035.endm
1036
1037.macro stalloc n
1038 sub sp, sp, #\n
1039 .pad #\n
1040.endm
1041
1042.macro stfree n
1043 add sp, sp, #\n
1044 .pad #-\n
1045.endm
1046
1047.macro pushreg rr:vararg
1f1fd884 1048 push {\rr}
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1049 .save {\rr}
1050.endm
1051
1052.macro popreg rr:vararg
1f1fd884 1053 pop {\rr}
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1054.endm
1055
1056.macro pushvfp rr:vararg
1057 vstmdb sp!, {\rr}
1058 .vsave {\rr}
1059.endm
1060
1061.macro popvfp rr:vararg
1062 vldmia sp!, {\rr}
1063.endm
1064
1065.macro endprologue
1066.endm
1067
1068// No need for prologue markers on ARM.
1069#define FUNC_POSTHOOK(_) .L$_prologue_p = -1
1070
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1071#endif
1072
1073///--------------------------------------------------------------------------
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1074/// AArch64-specific hacking.
1075
1076#if CPUFAM_ARM64
1077
1078// Set the function hooks.
1079#define FUNC_PREHOOK(_) .balign 4
1080#define FUNC_POSTHOOK(_) .cfi_startproc; .L$_prologue_p = -1
1081#define ENDFUNC_HOOK(_) .cfi_endproc
1082
1083// Call external subroutine at ADDR, possibly via PLT.
1084.macro callext addr
1085 bl \addr
1086.endm
1087
1088// Load address of external symbol ADDR into REG.
1089.macro leaext reg, addr
1090#if WANT_PIC
1091 adrp \reg, :got:\addr
1092 ldr \reg, [\reg, #:got_lo12:\addr]
1093#else
1094 adrp \reg, \addr
1095 add \reg, \reg, #:lo12:\addr
1096#endif
1097.endm
1098
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1099.macro vzero vz=v31
1100 // Set VZ (default v31) to zero.
1101 dup \vz\().4s, wzr
1102.endm
1103
1104.macro vshl128 vd, vn, nbit, vz=v31
1105 // Set VD to VN shifted left by NBIT. Assume VZ (default v31) is
1106 // all-bits-zero. NBIT must be a multiple of 8.
1107 .if \nbit&3 != 0
1108 .error "shift quantity must be whole number of bytes"
1109 .endif
1110 ext \vd\().16b, \vz\().16b, \vn\().16b, #16 - (\nbit >> 3)
1111.endm
1112
1113.macro vshr128 vd, vn, nbit, vz=v31
1114 // Set VD to VN shifted right by NBIT. Assume VZ (default v31) is
1115 // all-bits-zero. NBIT must be a multiple of 8.
1116 .if \nbit&3 != 0
1117 .error "shift quantity must be whole number of bytes"
1118 .endif
1119 ext \vd\().16b, \vn\().16b, \vz\().16b, #\nbit >> 3
1120.endm
1121
e492db88 1122// Stack management and unwinding.
42c44b27 1123.macro setfp fp=x29, offset=0
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1124 // If you're just going through the motions with a fixed-size stack frame,
1125 // then you want to say `add x29, sp, #OFFSET' directly, which will avoid
1126 // pointlessly restoring sp later.
1127 .if \offset == 0
1128 mov \fp, sp
1129 .cfi_def_cfa_register \fp
1130 .else
1131 add \fp, sp, #\offset
1132 .cfi_def_cfa_register \fp
1133 .cfi_adjust_cfa_offset -\offset
1134 .endif
1135 .macro dropfp; _dropfp \fp, \offset; .endm
1136 .L$_frameptr_p = -1
1137.endm
1138
cdc153a5 1139.macro _dropfp fp, offset=0
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1140 .if \offset == 0
1141 mov sp, \fp
1142 .cfi_def_cfa_register sp
1143 .else
1144 sub sp, \fp, #\offset
1145 .cfi_def_cfa_register sp
1146 .cfi_adjust_cfa_offset +\offset
1147 .endif
1148 .purgem dropfp
1149 .L$_frameptr_p = 0
1150.endm
1151
1152.macro stalloc n
1153 sub sp, sp, #\n
1154 .cfi_adjust_cfa_offset +\n
1155.endm
1156
1157.macro stfree n
1158 add sp, sp, #\n
1159 .cfi_adjust_cfa_offset -\n
1160.endm
1161
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1162.macro pushreg x, y=nil
1163 .ifeqs "\y", "nil"
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1164 str \x, [sp, #-16]!
1165 .cfi_adjust_cfa_offset +16
1166 .cfi_rel_offset \x, 0
1167 .else
1168 stp \x, \y, [sp, #-16]!
1169 .cfi_adjust_cfa_offset +16
1170 .cfi_rel_offset \x, 0
1171 .cfi_rel_offset \y, 8
1172 .endif
1173.endm
1174
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1175.macro popreg x, y=nil
1176 .ifeqs "\y", "nil"
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1177 ldr \x, [sp], #16
1178 .cfi_restore \x
1179 .cfi_adjust_cfa_offset -16
1180 .else
1181 ldp \x, \y, [sp], #16
1182 .cfi_restore \x
1183 .cfi_restore \y
1184 .cfi_adjust_cfa_offset -16
1185 .endif
1186.endm
1187
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1188.macro savereg x, y, z=nil
1189 .ifeqs "\z", "nil"
1190 str \x, [sp, \y]
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1191 .cfi_rel_offset \x, \y
1192 .else
1193 stp \x, \y, [sp, #\z]
1194 .cfi_rel_offset \x, \z
1195 .cfi_rel_offset \y, \z + 8
1196 .endif
1197.endm
1198
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1199.macro rstrreg x, y, z=nil
1200 .ifeqs "\z", "nil"
1201 ldr \x, [sp, \y]
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1202 .cfi_restore \x
1203 .else
1204 ldp \x, \y, [sp, #\z]
1205 .cfi_restore \x
1206 .cfi_restore \y
1207 .endif
1208.endm
1209
1210.macro endprologue
1211.endm
1212
1213#endif
1214
1215///--------------------------------------------------------------------------
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1216/// Final stuff.
1217
1218// Default values for the various hooks.
1219#ifndef FUNC_PREHOOK
1e5664a6 1220# define FUNC_PREHOOK(_)
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1221#endif
1222#ifndef FUNC_POSTHOOK
1e5664a6 1223# define FUNC_POSTHOOK(_)
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1224#endif
1225#ifndef ENDFUNC_HOOK
1e5664a6 1226# define ENDFUNC_HOOK(_)
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1227#endif
1228
1229#ifndef F
1230# define F(name) name
1231#endif
1232
1233#ifndef TYPE_FUNC
1234# define TYPE_FUNC(name)
1235#endif
1236
1237#ifndef SIZE_OBJ
1238# define SIZE_OBJ(name)
1239#endif
1240
91c8af7d 1241#if __ELF__ && !defined(WANT_EXECUTABLE_STACK)
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1242 .pushsection .note.GNU-stack, "", _SECTTY(progbits)
1243 .popsection
1244#endif
1245
1a0c09c4 1246///----- That's all, folks --------------------------------------------------
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1247
1248#endif