From: Mark Wooding Date: Mon, 19 Oct 2020 04:34:05 +0000 (+0100) Subject: Set and dump (almost) all of the ARM64 general registers. X-Git-Url: https://git.distorted.org.uk/~mdw/xchg-rax-rax/commitdiff_plain/b5872e2dbb058db15e500695c67f497ca5001490 Set and dump (almost) all of the ARM64 general registers. Omitting only: x18 (platform register), x30 (link register, needed for procedure linkage), and x31 (stack pointer/zero register). --- diff --git a/main.c b/main.c index df4b941..b68e985 100644 --- a/main.c +++ b/main.c @@ -26,7 +26,9 @@ union reg { #elif defined(__aarch64__) # define GPREGS(_) \ _(x0) _(x1) _(x2) _(x3) _(x4) _(x5) _(x6) _(x7) \ - _(x8) _(x9) _(x10) _(x11) _(x12) _(x13) _(x14) _(x15) + _(x8) _(x9) _(x10) _(x11) _(x12) _(x13) _(x14) _(x15) \ + _(x16) _(x17) _(x19) _(x20) _(x21) _(x22) _(x23) \ + _(x24) _(x25) _(x26) _(x27) _(x28) _(x29) #else # error "not supported" #endif diff --git a/xchg.S b/xchg.S index 8e0bf66..c99e0a6 100644 --- a/xchg.S +++ b/xchg.S @@ -387,11 +387,17 @@ proc call_example stp x23, x24, [sp, #48] stp x25, x26, [sp, #64] stp x27, x28, [sp, #80] - str x1, [sp, #96] - - mov x16, x0 - - ldr x17, [x1, #128] + str x1, [sp, #104] + + ldp x29, x30, [x1, #224] + msr nzcv, x30 + mov x30, x0 + ldp x27, x28, [x1, #208] + ldp x25, x26, [x1, #192] + ldp x23, x24, [x1, #176] + ldp x21, x22, [x1, #160] + ldp x19, x20, [x1, #144] + ldp x16, x17, [x1, #128] ldp x14, x15, [x1, #112] ldp x12, x13, [x1, #96] ldp x10, x11, [x1, #80] @@ -400,21 +406,27 @@ proc call_example ldp x4, x5, [x1, #32] ldp x2, x3, [x1, #16] ldp x0, x1, [x1, #0] - msr nzcv, x17 - - blr x16 - - ldr x16, [sp, #96] - mrs x17, nzcv - str x17, [x16, #128] - stp x14, x15, [x16, #112] - stp x12, x13, [x16, #96] - stp x10, x11, [x16, #80] - stp x8, x9, [x16, #64] - stp x6, x7, [x16, #48] - stp x4, x5, [x16, #32] - stp x2, x3, [x16, #16] - stp x0, x1, [x16, #0] + + blr x30 + + ldr x30, [sp, #104] + stp x27, x28, [x30, #208] + stp x25, x26, [x30, #192] + stp x23, x24, [x30, #176] + stp x21, x22, [x30, #160] + stp x19, x20, [x30, #144] + stp x16, x17, [x30, #128] + stp x14, x15, [x30, #112] + stp x12, x13, [x30, #96] + stp x10, x11, [x30, #80] + stp x8, x9, [x30, #64] + stp x6, x7, [x30, #48] + stp x4, x5, [x30, #32] + stp x2, x3, [x30, #16] + stp x0, x1, [x30, #0] + mov x0, x30 + mrs x30, nzcv + stp x29, x30, [x0, #224] ldp x19, x20, [sp, #16] ldp x21, x22, [sp, #32]