#! /usr/bin/python ### -*-python-*- ### ### Generate input script and expected output for bit manipulation, ### particularly 64-bit arithmetic. import sys as SYS import random as R if SYS.version_info >= (3,): xrange = range NVEC = 64 WD = 64 LIMIT = 1 << WD MASK = LIMIT - 1 FMT = "%%0%dx" % (WD/4) def rol(x, n): return ((x << n) | (x >> (WD - n))) & MASK def ror(x, n): return ((x >> n) | (x << (WD - n))) & MASK class BaseVector (object): def __init__(me): me._all = [] def newseed(me, seed): me._curr = [] me._all.append((seed, me._curr)) def _append(me, *args): if len(args) != len(me._REGS): raise TypeError("expected %d arguments" % len(me._REGS)) me._curr.append(args) def write(me): print("") print("[%s]" % me._NAME) for seed, vv in me._all: print("") print(";;; seed = 0x%08x" % seed) for v in vv: print("") for r, x in zip(me._REGS, v): print("%s = %s" % (r, me._RFMT[r] % x)) class ShiftVector (BaseVector): _REGS = ["x", "n", "z"] _RFMT = { "x": FMT, "n": "%d", "z": FMT } def add(me, r): for i in xrange(NVEC): x = r.randrange(LIMIT) n = r.randrange(70)%WD z = me._op(x, n) me._append(x, n, z) for i in xrange(4): x = r.randrange(LIMIT) z = me._op(x, WD/2) me._append(x, WD/2, z) class LSLVector (ShiftVector): _NAME = "lsl64" def _op(me, x, n): return (x << n)&MASK class LSRVector (ShiftVector): _NAME = "lsr64" def _op(me, x, n): return (x >> n)&MASK class ROLVector (ShiftVector): _NAME = "rol64" def _op(me, x, n): return rol(x, n) class RORVector (ShiftVector): _NAME = "ror64" def _op(me, x, n): return ror(x, n) class ArithVector (BaseVector): _REGS = ["x", "y", "z"] _RFMT = { "x": FMT, "y": FMT, "z": FMT } def add(me, r): for i in xrange(NVEC): x = r.randrange(LIMIT) y = r.randrange(LIMIT) z = me._op(x, y) me._append(x, y, z) class AddVector (ArithVector): _NAME = "add64" def _op(me, x, y): return (x + y)&MASK class SubVector (ArithVector): _NAME = "sub64" def _op(me, x, y): return (x - y)&MASK VECS = [LSLVector(), LSRVector(), ROLVector(), RORVector(), AddVector(), SubVector()] for arg in SYS.argv[1:]: if arg == "-": seed = R.SystemRandom().randrange(1 << 32) else: seed = int(arg, 0) r = R.Random(seed) for v in VECS: v.newseed(seed); v.add(r) print(";;; -*-conf-*- Test vectors for 64-bit arithmetic macros") print(";;; [generated]") for v in VECS: v.write()