Commit | Line | Data |
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7cf5c72a MW |
1 | #! /usr/bin/python |
2 | ### -*-python-*- | |
3 | ### | |
4 | ### Generate input script and expected output for bit manipulation, | |
5 | ### particularly 64-bit arithmetic. | |
6 | ||
7 | import sys as SYS | |
8 | import random as R | |
9 | ||
10 | NVEC = 64 | |
11 | WD = 64 | |
12 | LIMIT = 1 << WD | |
13 | MASK = LIMIT - 1 | |
14 | ||
e243edbc | 15 | ARGS = SYS.argv[1:]; ARGS.reverse() |
7cf5c72a | 16 | def arg(default = None): |
e243edbc MW |
17 | if len(ARGS): return ARGS.pop() |
18 | else: return default | |
7cf5c72a MW |
19 | |
20 | R.seed(None) | |
29922fc0 MW |
21 | seed = arg() |
22 | if seed is None: SEED = R.randrange(0, 1 << 32) | |
23 | else: SEED = int(seed, 0) | |
7cf5c72a MW |
24 | R.seed(SEED) |
25 | ||
26 | print '### Test vectors for 64-bit arithmetic macros' | |
27 | print '### [generated; seed = 0x%08x]' % SEED | |
28 | ||
29 | def rol(x, n): return ((x << n) | (x >> (WD - n))) & MASK | |
30 | def ror(x, n): return ((x >> n) | (x << (WD - n))) & MASK | |
31 | def put(x): return '%0*x' % (WD/4, x) | |
32 | ||
33 | for name, func in [('lsl', lambda x, n: x << n), | |
34 | ('lsr', lambda x, n: x >> n), | |
35 | ('rol', rol), | |
36 | ('ror', ror)]: | |
37 | print '\n%s64 {' % name | |
38 | for i in xrange(NVEC): | |
39 | x = R.randrange(LIMIT) | |
40 | sh = R.randrange(0, 70) & 63 | |
41 | print ' %s %2d %s;' % (put(x), sh, put(func(x, sh) & MASK)) | |
42 | for i in xrange(4): | |
43 | x = R.randrange(LIMIT) | |
44 | sh = 32 | |
45 | print ' %s %2d %s;' % (put(x), sh, put(func(x, sh) & MASK)) | |
46 | print '}' | |
47 | ||
48 | for name, func in [('add', lambda x, y: x + y), | |
49 | ('sub', lambda x, y: x - y)]: | |
50 | print '\n%s64 {' % name | |
51 | for i in xrange(NVEC): | |
52 | x = R.randrange(LIMIT) | |
53 | y = R.randrange(LIMIT) | |
54 | print ' %s %s %s;' % (put(x), put(y), put(func(x, y) & MASK)) | |
55 | print '}' |