X-Git-Url: https://git.distorted.org.uk/~mdw/catacomb/blobdiff_plain/a90d420cbe87490c844ae422c966e746d3134b07..ca6a6ec74c7db2849068f819951dd8b3375582f0:/base/dispatch-x86ish.S

diff --git a/base/dispatch-x86ish.S b/base/dispatch-x86ish.S
index c3725fc6..3a14c396 100644
--- a/base/dispatch-x86ish.S
+++ b/base/dispatch-x86ish.S
@@ -67,7 +67,9 @@ FUNC(dispatch_x86ish_cpuid)
   endprologue
 
 	// First, check that this is even a thing, using the complicated
-	// dance with the flags register.
+	// dance with the flags register.  This is unnecessary on AMD64,
+	// which postdates the introduction of `cpuid'.
+#if CPUFAM_X86
 	pushf
 	pop	DX			// current flags in d
 
@@ -86,6 +88,7 @@ FUNC(dispatch_x86ish_cpuid)
 	pop	DX
 	test	edx, EFLAGS_ID
 	jnz	8f
+#endif
 
 	// OK, that seemed to work.
 	cpuid
@@ -108,6 +111,7 @@ FUNC(dispatch_x86ish_cpuid)
 	ret
 
 	// Failed.
+#if CPUFAM_X86
 8:	xor	eax, eax
 	mov	[OUT + 0], eax
 	mov	[OUT + 4], eax
@@ -115,6 +119,7 @@ FUNC(dispatch_x86ish_cpuid)
 	mov	[OUT + 12], eax
 	mov	eax, -1
 	jmp	9b
+#endif
 ENDFUNC
 
 ///--------------------------------------------------------------------------
@@ -132,16 +137,17 @@ FUNC(dispatch_x86ish_xmmregisters_p)
 
 	// Save the floating point and SIMD registers, and try to clobber
 	// xmm0.
+	lea	DX, [SP + 160]
 	fxsave	[SP]
-	mov	eax, [SP + 160]
-	xor	dword ptr [SP + 160], 0xaaaa5555
+	mov	eax, [DX]
+	xor	dword ptr [DX], 0xaaaa5555
 	fxrstor	[SP]
 
 	// Save them again, and read back the low word of xmm0.  Undo the
 	// clobbering and restore.
 	fxsave	[SP]
-	mov	ecx, [SP + 160]
-	mov	[SP + 160], eax
+	mov	ecx, [DX]
+	mov	[DX], eax
 	fxrstor	[SP]
 
 	// The register are live if we read different things.
@@ -154,36 +160,89 @@ FUNC(dispatch_x86ish_xmmregisters_p)
 ENDFUNC
 
 ///--------------------------------------------------------------------------
+/// Checking extended control registers.
+
+FUNC(dispatch_x86ish_xgetbv)
+	// Call with two arguments: a pointer Z_OUT to 8 bytes of output space, and
+	// a 32-bit integer C.  Read the 64-bit value of XCR(C), and store it
+	// at Z_OUT.
+
+#if CPUFAM_X86
+#  define Z_OUT edi
+	pushreg	edi
+	mov	edi, [esp + 8]
+	mov	ecx, [esp + 12]
+#endif
+#if CPUFAM_AMD64 && ABI_SYSV
+#  define Z_OUT rdi
+	mov	ecx, esi
+#endif
+#if CPUFAM_AMD64 && ABI_WIN
+#  define Z_OUT r8
+	mov	r8, rcx
+	mov	ecx, edx
+#endif
+  endprologue
+
+	xgetbv
+	mov	[Z_OUT + 0], eax
+	mov	[Z_OUT + 4], edx
+
+#if CPUFAM_X86
+	popreg	edi
+#endif
+	ret
+
+#undef Z_OUT
+ENDFUNC
+
+///--------------------------------------------------------------------------
 /// Checking `rdrand'.
 
 FUNC(dispatch_x86ish_rdrand)
-	// Enter with one argument: a pointer X_OUT to a 32-bit word.  Try to
-	// generate a random word using `rdrand'.  If successful, set *X_OUT
-	// to the generated word, and return zero; otherwise, return -1.
+	// Enter with two arguments: a code OP requesting either `rdrand' (0)
+	// or `rdseed' (1), and a pointer X_OUT to a 32-bit word.  Try to
+	// generate a random word using the requested instruction'.  If
+	// successful, set *X_OUT to the generated word, and return zero;
+	// otherwise, return -1.
 
 #if CPUFAM_X86
+#  define OP eax
 #  define X_OUT edx
 #  define COUNT ecx
-	mov	X_OUT, [SP + 4]
+	mov	OP, [SP + 4]
+	mov	X_OUT, [SP + 8]
 #endif
 #if CPUFAM_AMD64 && ABI_SYSV
-#  define X_OUT rdi
+#  define OP edi
+#  define X_OUT rsi
 #  define COUNT ecx
 #endif
 #if CPUFAM_AMD64 && ABI_WIN
-#  define X_OUT rcx
-#  define COUNT edx
+#  define OP rcx
+#  define X_OUT rdx
+#  define COUNT r8d
 #endif
   endprologue
 
+	cmp	OP, 0
 	mov	COUNT, 16		// fairly persistent
+	jne	1f
+
 0:	rdrand	eax
 	jc	9f
 	dec	COUNT
 	jnz	0b
+	jmp	8f
+
+1:	rdseed	eax
+	jc	9f
+	dec	COUNT
+	jnz	1b
+	jmp	8f
 
 	// Failed to come up with a random value.
-	mov	eax, -1
+8:	mov	eax, -1
 	ret
 
 	// Success.