#define REGSRC_SIMD 0x04000000 /* SIMD vector register */
#define REGSRC_STMMX 0x05000000 /* x86-specific: x87/MMX register */
#define REGSRC_SEG 0x06000000 /* x86-specific: segment register */
+#define REGSRC_NONE 0x0f000000 /* just a message */
/* Where to find the values. */
#define REGF_WDMASK 0xf0000000
lea SP, [SP + REGDUMP_SPADJ]
.endm
+.macro _nilbase
+# if CPUFAM_X86
+ xor eax, eax
+ mov [SP + 0], eax
+# elif ABI_SYSV
+ xor edi, edi
+# elif ABI_WIN
+ xor ecx, ecx
+# endif
+.endm
+
.macro _regbase
# if CPUFAM_X86
mov [SP + 0], BP
add r13, r13, #REGDUMP_GPSIZE
.endm
+.macro _nilbase
+ mov r0, #0
+.endm
+
.macro _regbase
mov r0, r5
.endm
add sp, sp, #REGDUMP_GPSIZE
.endm
+.macro _nilbase
+ mov x0, #0
+.endm
+
.macro _regbase
mov x0, x21
.endm
_rstrregs
.endm
+.macro msg lbl
+ _saveregs
+ _nilbase
+ _reglbl "\lbl"
+ _regfmt REGSRC_NONE | (1 << REGF_WDSHIFT)
+ callext F(regdump)
+ _rstrregs
+.endm
+
.macro reg lbl, rn, fmt=0
_saveregs
_regbase