#endif
#define WHOLE(reg) _REGFORM(reg, r)
+// Macros for some common registers.
+#define AX R_a(r)
+#define BX R_b(r)
+#define CX R_c(r)
+#define DX R_d(r)
+#define SI R_si(r)
+#define DI R_di(r)
+#define BP R_bp(r)
+#define SP R_sp(r)
+
// Stack management and unwinding.
-.macro setfp fp=R_bp(r), offset=0
+.macro setfp fp=BP, offset=0
.if \offset == 0
- mov \fp, R_sp(r)
+ mov \fp, SP
#if __ELF__
.cfi_def_cfa_register \fp
#endif
.seh_setframe \fp, 0
#endif
.else
- lea \fp, [R_sp(r) + \offset]
+ lea \fp, [SP + \offset]
#if __ELF__
.cfi_def_cfa_register \fp
.cfi_adjust_cfa_offset -\offset
.macro _dropfp fp, offset=0
.if \offset == 0
- mov R_sp(r), \fp
+ mov SP, \fp
#if __ELF__
- .cfi_def_cfa_register R_sp(r)
+ .cfi_def_cfa_register SP
#endif
.else
- lea R_sp(r), [\fp - \offset]
+ lea SP, [\fp - \offset]
#if __ELF__
- .cfi_def_cfa_register R_sp(r)
+ .cfi_def_cfa_register SP
.cfi_adjust_cfa_offset +\offset
#endif
.endif
.endm
.macro stalloc n
- sub R_sp(r), \n
+ sub SP, \n
#if __ELF__
.cfi_adjust_cfa_offset +\n
#endif
.endm
.macro stfree n
- add R_sp(r), \n
+ add SP, \n
#if __ELF__
.cfi_adjust_cfa_offset -\n
#endif
.endm
.macro savexmm r, offset
- movdqa [R_sp(r) + \offset], \r
+ movdqa [SP + \offset], \r
#if ABI_WIN && CPUFAM_AMD64
.seh_savexmm \r, \offset
#endif
.endm
.macro rstrxmm r, offset
- movdqa \r, [R_sp(r) + \offset]
+ movdqa \r, [SP + \offset]
.endm
.macro endprologue