math/mpx-mul4-{arm-neon,arm64-simd}.S, etc.: Add ARM versions of `mul4'.
[catacomb] / math / mpmont.c
index f8a2611..6109c85 100644 (file)
@@ -90,26 +90,47 @@ static void simple_redccore(mpw *dv, mpw *dvl, const mpw *mv,
 
 #if CPUFAM_X86
   MAYBE_REDC4(x86_sse2)
+  MAYBE_REDC4(x86_avx)
 #endif
 
 #if CPUFAM_AMD64
   MAYBE_REDC4(amd64_sse2)
+  MAYBE_REDC4(amd64_avx)
+#endif
+
+#if CPUFAM_ARMEL
+  MAYBE_REDC4(arm_neon)
+#endif
+
+#if CPUFAM_ARM64
+  MAYBE_REDC4(arm64_simd)
 #endif
 
 static redccore__functype *pick_redccore(void)
 {
 #if CPUFAM_X86
+  DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_x86_avx,
+                    cpu_feature_p(CPUFEAT_X86_AVX));
   DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_x86_sse2,
                     cpu_feature_p(CPUFEAT_X86_SSE2));
 #endif
 #if CPUFAM_AMD64
+  DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_amd64_avx,
+                    cpu_feature_p(CPUFEAT_X86_AVX));
   DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_amd64_sse2,
                     cpu_feature_p(CPUFEAT_X86_SSE2));
 #endif
+#if CPUFAM_ARMEL
+  DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_arm_neon,
+                    cpu_feature_p(CPUFEAT_ARM_NEON));
+#endif
+#if CPUFAM_ARM64
+  DISPATCH_PICK_COND(mpmont_reduce, maybe_redc4_arm64_simd, 1);
+#endif
   DISPATCH_PICK_FALLBACK(mpmont_reduce, simple_redccore);
 }
 
-/* --- @redccore@ --- *
+/* --- @mulcore@ --- *
  *
  * Arguments:  @mpw *dv, *dvl@ = base and limit of source/destination
  *             @const mpw *av, *avl@ = base and limit of first multiplicand
@@ -190,22 +211,43 @@ static void simple_mulcore(mpw *dv, mpw *dvl,
 
 #if CPUFAM_X86
   MAYBE_MUL4(x86_sse2)
+  MAYBE_MUL4(x86_avx)
 #endif
 
 #if CPUFAM_AMD64
   MAYBE_MUL4(amd64_sse2)
+  MAYBE_MUL4(amd64_avx)
+#endif
+
+#if CPUFAM_ARMEL
+  MAYBE_MUL4(arm_neon)
+#endif
+
+#if CPUFAM_ARM64
+  MAYBE_MUL4(arm64_simd)
 #endif
 
 static mulcore__functype *pick_mulcore(void)
 {
 #if CPUFAM_X86
+  DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_x86_avx,
+                    cpu_feature_p(CPUFEAT_X86_AVX));
   DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_x86_sse2,
                     cpu_feature_p(CPUFEAT_X86_SSE2));
 #endif
 #if CPUFAM_AMD64
+  DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_amd64_avx,
+                    cpu_feature_p(CPUFEAT_X86_AVX));
   DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_amd64_sse2,
                     cpu_feature_p(CPUFEAT_X86_SSE2));
 #endif
+#if CPUFAM_ARMEL
+  DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_arm_neon,
+                    cpu_feature_p(CPUFEAT_ARM_NEON));
+#endif
+#if CPUFAM_ARM64
+  DISPATCH_PICK_COND(mpmont_mul, maybe_mul4_arm64_simd, 1);
+#endif
   DISPATCH_PICK_FALLBACK(mpmont_mul, simple_mulcore);
 }
 
@@ -432,6 +474,10 @@ mp *mpmont_mul(const mpmont *mm, mp *d, mp *a, mp *b)
 
 #ifdef TEST_RIG
 
+#ifdef ENABLE_ASM_DEBUG
+#  include "regdump.h"
+#endif
+
 static int tcreate(dstr *v)
 {
   mp *m = *(mp **)v[0].buf;
@@ -527,7 +573,6 @@ static int tmul(dstr *v)
     mp_drop(mr);
   }
 
-
   MP_DROP(m);
   MP_DROP(a);
   MP_DROP(b);
@@ -546,6 +591,9 @@ static test_chunk tests[] = {
 int main(int argc, char *argv[])
 {
   sub_init();
+#ifdef ENABLE_ASM_DEBUG
+  regdump_init();
+#endif
   test_run(argc, argv, tests, SRCDIR "/t/mpmont");
   return (0);
 }