+ cpuid_feature_p(CPUID_1_C, CPUID1C_RDRAND) &&
+ rdrand_works_p(OP_RDRAND));
+ CASE_CPUFEAT(X86_AVX, "x86:avx",
+ cpuid_feature_p(CPUID_1_C, CPUID1C_AVX) &&
+ ymm_registers_available_p());
+ CASE_CPUFEAT(X86_AVX2, "x86:avx2",
+ cpuid_feature_p(CPUID_1_C, CPUID1C_AVX) &&
+ cpuid_feature_p(CPUID_7_0_B, CPUID70B_AVX2) &&
+ ymm_registers_available_p());
+ CASE_CPUFEAT(X86_SSSE3, "x86:ssse3",
+ cpuid_feature_p(CPUID_1_C, CPUID1C_SSSE3) &&
+ xmm_registers_available_p());
+ CASE_CPUFEAT(X86_PCLMUL, "x86:pclmul",
+ cpuid_feature_p(CPUID_1_C, CPUID1C_PCLMUL) &&
+ xmm_registers_available_p());
+ CASE_CPUFEAT(X86_RDSEED, "x86:rdseed",
+ cpuid_feature_p(CPUID_7_0_B, CPUID70B_RDSEED) &&
+ rdrand_works_p(OP_RDSEED));