progs/perftest.c: Use from Glibc syscall numbers.
[catacomb] / base / dispatch.h
index 612cfcd..9f33534 100644 (file)
@@ -138,8 +138,34 @@ stcls ret ext argdecls { rtn dflt args; }
 
 #endif
 
+/* --- Some macros for producing useful debugging --- */
+
+#define DISPATCH_PICK_COND(what, func, cond) do {                      \
+  if (cond) {                                                          \
+    dispatch_debug("picked `%s' for `%s'", #func, #what);              \
+    return (func);                                                     \
+  }                                                                    \
+} while (0)
+#define DISPATCH_PICK_FALLBACK(what, func) do {                                \
+  dispatch_debug("using default `%s'", #what);                         \
+  return (func);                                                       \
+} while (0)
+
 /*----- Functions provided ------------------------------------------------*/
 
+/* --- @dispatch_debug@ --- *
+ *
+ * Arguments:  @const char *fmt@ = a format string
+ *             @...@ = additional arguments
+ *
+ * Returns:    ---
+ *
+ * Use:                Writes a formatted message to standard output if dispatch
+ *             debugging is enabled.
+ */
+
+extern void dispatch_debug(const char */*fmt*/, ...);
+
 /* --- @cpu_feature_p@ --- *
  *
  * Arguments:  @unsigned feat@ = a @CPUFEAT_...@ code
@@ -149,7 +175,19 @@ stcls ret ext argdecls { rtn dflt args; }
 
 enum {
   CPUFEAT_X86_SSE2,                    /* Streaming SIMD Extensions 2 */
-  CPUFEAT_X86_AESNI                    /* AES Native Instructions */
+  CPUFEAT_X86_AESNI,                   /* AES Native Instructions */
+  CPUFEAT_ARM_VFP,                     /* VFP floating-point (v3 or v4) */
+  CPUFEAT_ARM_NEON,                    /* Advanced SIMD (v1 or v2) */
+  CPUFEAT_ARM_V4,                      /* VFPv4 and/or SIMD v2 */
+  CPUFEAT_ARM_D32,                     /* 32 double registers, not 16 */
+  CPUFEAT_X86_RDRAND,                  /* Built-in cooked entropy source */
+  CPUFEAT_ARM_AES,                     /* AES instructions */
+  CPUFEAT_X86_AVX,                     /* AVX 1 (i.e., 256-bit YMM regs) */
+  CPUFEAT_X86_SSSE3,                   /* Supplementary SSE 3 */
+  CPUFEAT_X86_PCLMUL,                  /* Carry-less multiplication */
+  CPUFEAT_ARM_PMULL,                   /* Polynomial multiplication */
+  CPUFEAT_X86_RDSEED,                  /* Built-in raw entropy source */
+  CPUFEAT_X86_AVX2                     /* AVX 2 (256-bit integer ops) */
 };
 
 extern int cpu_feature_p(int /*feat*/);