--- /dev/null
+/// -*- mode: asm; asm-comment-char: ?/ -*-
+///
+/// Register dump and debugging for 64-bit ARM
+///
+/// (c) 2019 Straylight/Edgeware
+///
+
+///----- Licensing notice ---------------------------------------------------
+///
+/// This file is part of Catacomb.
+///
+/// Catacomb is free software: you can redistribute it and/or modify it
+/// under the terms of the GNU Library General Public License as published
+/// by the Free Software Foundation; either version 2 of the License, or
+/// (at your option) any later version.
+///
+/// Catacomb is distributed in the hope that it will be useful, but
+/// WITHOUT ANY WARRANTY; without even the implied warranty of
+/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+/// Library General Public License for more details.
+///
+/// You should have received a copy of the GNU Library General Public
+/// License along with Catacomb. If not, write to the Free Software
+/// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
+/// USA.
+
+///--------------------------------------------------------------------------
+/// Preliminaries.
+
+#include "config.h"
+#include "asm-common.h"
+#include "regdump.h"
+
+ .arch armv8-a
+
+ .text
+
+///--------------------------------------------------------------------------
+/// Main code.
+
+FUNC(regdump_gpsave)
+ endprologue
+ // On entry, sp should point to `REGDUMP_GPSIZE' bytes of
+ // doubleword-aligned storage to be the general-purpose save area,
+ // with x16, x17, and x30 already saved. On exit, the initial
+ // registers are saved in this space, and modified: x20 points to the
+ // general-purpose save area, x22 holds the focus address (possibly
+ // already saved), x0 contains the number of bytes required in the
+ // extended save area, and other general-purpose registers are
+ // clobbered or used to communicate with `regdump_xtsave' below.
+ // Doing anything other than lowering the stack pointer and calling
+ // `regdump_xtsave' is not recommended.
+
+ // Save the easy registers.
+ stp x0, x1, [sp, #0]
+ stp x2, x3, [sp, #16]
+ stp x4, x5, [sp, #32]
+ stp x6, x7, [sp, #48]
+ stp x8, x9, [sp, #64]
+ stp x10, x11, [sp, #80]
+ stp x12, x13, [sp, #96]
+ stp x14, x15, [sp, #112]
+ stp x18, x19, [sp, #144]
+ stp x20, x21, [sp, #160]
+ stp x22, x23, [sp, #176]
+ stp x24, x25, [sp, #192]
+ stp x26, x27, [sp, #208]
+ stp x28, x29, [sp, #224]
+
+ mov x20, sp
+
+ // Determine the previous stack pointer and save it.
+ add x0, x20, #REGDUMP_GPSIZE
+ str x0, [x20, #31*8]
+
+ // Capture the status flags.
+ mrs x0, nzcv
+ str x0, [x20, #8*REGIX_NZCV]
+
+ // Set the return address as our PC.
+ str x30, [x20, #8*REGIX_PC]
+
+ // Load the focus address and save it as x22.
+ ldr x22, [x20, #8*REGIX_ADDR]
+
+ // Determine the extended save area size.
+ mov x0, #REGDUMP_FPSIZE
+
+ // Done.
+ ret
+
+ENDFUNC
+
+FUNC(regdump_gprstr)
+ endprologue
+ // On entry, x20 points to a general-purpose save area, established
+ // by `regdump_gpsave'. On exit, the general-purpose registers
+ // (other than x30 and sp) are restored to their original values.
+
+ // Restore the processor flags.
+ ldr w0, [x20, #8*REGIX_NZCV]
+ msr nzcv, x0
+
+ // Load the easy registers.
+ ldp x0, x1, [sp, #0]
+ ldp x2, x3, [sp, #16]
+ ldp x4, x5, [sp, #32]
+ ldp x6, x7, [sp, #48]
+ ldp x8, x9, [sp, #64]
+ ldp x10, x11, [sp, #80]
+ ldp x12, x13, [sp, #96]
+ ldp x14, x15, [sp, #112]
+ ldp x16, x17, [sp, #128]
+ ldp x18, x19, [sp, #144]
+ ldp x20, x21, [sp, #160]
+ ldp x22, x23, [sp, #176]
+ ldp x24, x25, [sp, #192]
+ ldp x26, x27, [sp, #208]
+ ldp x28, x29, [sp, #224]
+
+ // Done.
+ ret
+
+ENDFUNC
+
+FUNC(regdump_xtsave)
+ endprologue
+ // On entry, sp points to an extended save area, of size determined
+ // by `regdump_gpsave' above. On exit, the save area is filled in
+ // and a handy map placed at its base.
+
+ // Set up the map/extended save area pointer.
+ mov x21, sp
+
+ // Start by filling in the easy part of the map.
+ add x0, x21, #regmap_size
+ stp x20, x0, [x21]
+
+ // Get the FP status register.
+ mrs x1, fpsr
+ mrs x2, fpcr
+ stp w1, w2, [x0], #8
+
+ // Store the SIMD registers.
+ stp q0, q1, [x0, #0]
+ stp q2, q3, [x0, #32]
+ stp q4, q5, [x0, #64]
+ stp q6, q7, [x0, #96]
+ stp q8, q9, [x0, #128]
+ stp q10, q11, [x0, #160]
+ stp q12, q13, [x0, #192]
+ stp q14, q15, [x0, #224]
+ stp q16, q17, [x0, #256]
+ stp q18, q19, [x0, #288]
+ stp q20, q21, [x0, #320]
+ stp q22, q23, [x0, #352]
+ stp q24, q25, [x0, #384]
+ stp q26, q27, [x0, #416]
+ stp q28, q29, [x0, #448]
+ stp q30, q31, [x0, #480]
+
+ // Done.
+ ret
+
+ENDFUNC
+
+FUNC(regdump_xtrstr)
+ endprologue
+ // On entry, x21 points to a register-save map. On exit, the
+ // extended registers are restored from the save area, x20 (pointing
+ // to the general-purpose save area) is preserved, and the other
+ // general registers are clobbered.
+
+ ldr x0, [x21, #regmap_fp]
+
+ // Load the FP status and control registers.
+ ldp w1, w2, [x0], #8
+ msr fpsr, x1
+ msr fpcr, x2
+
+ // Load the SIMD registers.
+ ldp q0, q1, [x0, #0]
+ ldp q2, q3, [x0, #32]
+ ldp q4, q5, [x0, #64]
+ ldp q6, q7, [x0, #96]
+ ldp q8, q9, [x0, #128]
+ ldp q10, q11, [x0, #160]
+ ldp q12, q13, [x0, #192]
+ ldp q14, q15, [x0, #224]
+ ldp q16, q17, [x0, #256]
+ ldp q18, q19, [x0, #288]
+ ldp q20, q21, [x0, #320]
+ ldp q22, q23, [x0, #352]
+ ldp q24, q25, [x0, #384]
+ ldp q26, q27, [x0, #416]
+ ldp q28, q29, [x0, #448]
+ ldp q30, q31, [x0, #480]
+
+ // Done.
+ ret
+
+ENDFUNC
+
+///----- That's all, folks --------------------------------------------------