1 /// -*- mode: asm; asm-comment-char: ?/ -*-
3 /// Fancy SIMD implementation of Salsa20
5 /// (c) 2015 Straylight/Edgeware
8 ///----- Licensing notice ---------------------------------------------------
10 /// This file is part of Catacomb.
12 /// Catacomb is free software; you can redistribute it and/or modify
13 /// it under the terms of the GNU Library General Public License as
14 /// published by the Free Software Foundation; either version 2 of the
15 /// License, or (at your option) any later version.
17 /// Catacomb is distributed in the hope that it will be useful,
18 /// but WITHOUT ANY WARRANTY; without even the implied warranty of
19 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 /// GNU Library General Public License for more details.
22 /// You should have received a copy of the GNU Library General Public
23 /// License along with Catacomb; if not, write to the Free
24 /// Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
25 /// MA 02111-1307, USA.
27 ///--------------------------------------------------------------------------
28 /// External definitions.
31 #include "asm-common.h"
33 ///--------------------------------------------------------------------------
38 FUNC(salsa20_core_x86ish_avx)
47 FUNC(salsa20_core_x86ish_sse2)
52 // Arguments come in on the stack, and will need to be collected. We
53 // can get away with just the scratch registers for integer work, but
54 // we'll run out of XMM registers and will need some properly aligned
55 // space which we'll steal from the stack. I don't trust the stack
56 // pointer's alignment, so I'll have to mask the stack pointer, which
57 // in turn means I'll need to keep track of the old value. Hence I'm
58 // making a full i386-style stack frame here.
60 // The Windows and SysV ABIs are sufficiently similar that we don't
61 // need to worry about the differences here.
68 # define SAVE2 [esp + 0]
69 # define SAVE3 [esp + 16]
80 #if CPUFAM_AMD64 && ABI_SYSV
81 // This is nice. We have plenty of XMM registers, and the arguments
82 // are in useful places. There's no need to spill anything and we
83 // can just get on with the code.
94 # if CPUFAM_AMD64 && ABI_WIN
95 // Arguments come in registers, but they're different between Windows
96 // and everyone else (and everyone else is saner).
98 // The Windows ABI insists that we preserve some of the XMM
99 // registers, but we want more than we can use as scratch space. Two
100 // places we only need to save a copy of the input for the
101 // feedforward at the end; but the other two we want for the final
102 // permutation, so save the old values on the stack. (We need an
103 // extra 8 bytes to align the stack.)
110 # define SAVE2 [rsp + 32]
111 # define SAVE3 [rsp + 48]
120 // First job is to slurp the matrix into XMM registers. The words
121 // have already been permuted conveniently to make them line up
122 // better for SIMD processing.
124 // The textbook arrangement of the matrix is this.
131 // But we've rotated the columns up so that the main diagonal with
132 // the constants on it end up in the first row, giving something more
140 // so the transformation looks like this:
142 // [ 0 1 2 3] [ 0 5 10 15] (a, xmm0)
143 // [ 4 5 6 7] --> [ 4 9 14 3] (b, xmm1)
144 // [ 8 9 10 11] [ 8 13 2 7] (c, xmm2)
145 // [12 13 14 15] [12 1 6 11] (d, xmm3)
146 movdqu xmm0, [IN + 0]
147 movdqu xmm1, [IN + 16]
148 movdqu xmm2, [IN + 32]
149 movdqu xmm3, [IN + 48]
151 // Take a copy for later.
158 // Apply a column quarterround to each of the columns simultaneously.
159 // Alas, there doesn't seem to be a packed doubleword rotate, so we
160 // have to synthesize it.
162 // b ^= (a + d) <<< 7
171 // c ^= (b + a) <<< 9
180 // d ^= (c + b) <<< 13
183 pshufd xmm1, xmm1, SHUF(3, 0, 1, 2)
190 // a ^= (d + c) <<< 18
192 pshufd xmm3, xmm3, SHUF(1, 2, 3, 0)
194 pshufd xmm2, xmm2, SHUF(2, 3, 0, 1)
201 // The transpose conveniently only involves reordering elements of
202 // individual rows, which can be done quite easily, and reordering
203 // the rows themselves, which is a trivial renaming. It doesn't
204 // involve any movement of elements between rows.
206 // [ 0 5 10 15] [ 0 5 10 15] (a, xmm0)
207 // [ 4 9 14 3] --> [ 1 6 11 12] (b, xmm3)
208 // [ 8 13 2 7] [ 2 7 8 13] (c, xmm2)
209 // [12 1 6 11] [ 3 4 9 14] (d, xmm1)
211 // The shuffles have quite high latency, so they've been pushed
212 // backwards into the main instruction list.
214 // Apply the row quarterround to each of the columns (yes!)
217 // b ^= (a + d) <<< 7
226 // c ^= (b + a) <<< 9
235 // d ^= (c + b) <<< 13
238 pshufd xmm3, xmm3, SHUF(3, 0, 1, 2)
245 // a ^= (d + c) <<< 18
247 pshufd xmm1, xmm1, SHUF(1, 2, 3, 0)
249 pshufd xmm2, xmm2, SHUF(2, 3, 0, 1)
256 // We had to undo the transpose ready for the next loop. Again, push
257 // back the shuffles because they take a long time coming through.
258 // Decrement the loop counter and see if we should go round again.
259 // Later processors fuse this pair into a single uop.
263 // Almost there. Firstly, the feedforward addition.
264 paddd xmm0, SAVE0 // 0, 5, 10, 15
265 paddd xmm1, SAVE1 // 4, 9, 14, 3
266 paddd xmm2, SAVE2 // 8, 13, 2, 7
267 paddd xmm3, SAVE3 // 12, 1, 6, 11
269 // Next we must undo the permutation which was already applied to the
270 // input. This can be done by juggling values in registers, with the
271 // following fancy footwork: some row rotations, a transpose, and
272 // some more rotations.
273 pshufd xmm1, xmm1, SHUF(3, 0, 1, 2) // 3, 4, 9, 14
274 pshufd xmm2, xmm2, SHUF(2, 3, 0, 1) // 2, 7, 8, 13
275 pshufd xmm3, xmm3, SHUF(1, 2, 3, 0) // 1, 6, 11, 12
279 punpckldq xmm0, xmm2 // 0, 2, 5, 7
280 punpckldq xmm3, xmm1 // 1, 3, 6, 4
281 punpckhdq xmm4, xmm2 // 10, 8, 15, 13
282 punpckhdq xmm5, xmm1 // 11, 9, 12, 14
286 punpckldq xmm0, xmm3 // 0, 1, 2, 3
287 punpckldq xmm4, xmm5 // 10, 11, 8, 9
288 punpckhdq xmm1, xmm3 // 5, 6, 7, 4
289 punpckhdq xmm2, xmm5 // 15, 12, 13, 14
291 pshufd xmm1, xmm1, SHUF(3, 0, 1, 2) // 4, 5, 6, 7
292 pshufd xmm4, xmm4, SHUF(2, 3, 0, 1) // 8, 9, 10, 11
293 pshufd xmm2, xmm2, SHUF(1, 2, 3, 0) // 12, 13, 14, 15
295 // Finally we have to write out the result.
296 movdqu [OUT + 0], xmm0
297 movdqu [OUT + 16], xmm1
298 movdqu [OUT + 32], xmm4
299 movdqu [OUT + 48], xmm2
306 #if CPUFAM_AMD64 && ABI_WIN
312 // And with that, we're done.
325 ///----- That's all, folks --------------------------------------------------